KR-20260067878-A - MAGNETIC MEMORY DEVICE

Abstract

A magnetic memory device is provided. The magnetic memory device includes a cell array including a memory cell and an OTP cell, each including a magnetic tunnel junction element, and a control circuit that applies a write current to the OTP cell and performs a read operation of the OTP cell based on whether there is a change in the resistance of the OTP cell.

Inventors

• 김대식

Assignees

• 삼성전자주식회사

Dates

Publication Date

20260513

Application Date

20241106

Claims (10)

1. A cell array comprising a memory cell and an OTP cell, each comprising a magnetic tunnel junction element; and A magnetic memory device comprising a control circuit that applies a write current to the OTP cell and performs a read operation of the OTP cell based on whether there is a change in the resistance of the OTP cell.
2. In Article 1, The cell array further includes a reference cell comprising the magnetic tunnel junction element, and A memory device in which the above control circuit performs a read operation of the memory cell using the above reference cell and determines whether there is a change in the resistance of the OTP cell using the above reference cell.
3. In Article 1, A memory device in which the above control circuit performs a read operation of the memory cell using a reference resistor having a fixed resistance value and determines whether the resistance of the OTP cell changes using the reference resistor.
4. In Article 1, The cell array each includes a first reference cell and a second reference cell comprising the magnetic tunnel junction element, and The above control circuit is a magnetic memory device that performs a read operation of the memory cell using the first reference cell and the second reference cell, and determines whether there is a change in the resistance of the OTP cell using the first reference cell and the second reference cell.
5. In Paragraph 4, The above first reference cell and the above second reference cell are magnetic memory devices connected to different input/output circuits.
6. In Article 1, The above control circuit is a magnetic memory device that determines whether the resistance of the OTP cell changes based on a change in the magnitude of the write current while the write current is applied to the OTP cell.
7. In Article 1, A magnetic memory device in which the above memory cell and the above OTP cell are connected to different word lines.
8. In Article 1, The above memory cell and the above OTP cell are magnetic memory devices connected to different bit lines.
9. In Article 1, The above memory cell and the above OTP cell are magnetic memory devices connected to different input/output circuits.
10. In Article 1, A magnetic memory device in which the above memory cell and the above OTP cell are connected to the same input/output circuit.

Description

Magnetic Memory Device The present invention relates to a magnetic memory device. As electronic devices become faster and more energy-efficient, embedded memory devices also require fast read/write operations and low operating voltages. Magnetic memory devices are being researched to meet these demands. Magnetic memory devices are non-volatile and capable of high-speed operation, making them a promising next-generation memory technology. As magnetic memory devices become increasingly highly integrated, STT-MRAMs that store information using the Spin Transfer Torque (STT) phenomenon are being researched. STT-MRAMs can store information by inducing magnetization reversal through the direct application of current to a magnetic tunnel junction device. Highly integrated STT-MRAMs require high-speed operation and low-current operation. Meanwhile, One-Time-Programmable (OTP) memory is a non-volatile memory in which data is permanently retained through a single program. OTP is widely used in applications where data stability and security are critical, typically for the purpose of recording specific information only once and allowing it to be read repeatedly. Because OTP can be programmed only once, the information cannot be altered, thereby guaranteeing data integrity and stability. OTP is primarily used in applications requiring reliability and security. For example, it is utilized for storing information such as digital security tokens, smart cards, keys and passwords, boot codes, and production/manufacturing settings; it can be embedded as part of a semiconductor chip or provided as a standalone chip. When embedded as part of a chip, it is particularly useful as it allows for low-cost implementation without affecting the performance of the core logic, provided it is fully compatible with the logic CMOS process. FIG. 1 is an exemplary block diagram of a magnetic memory device according to some embodiments. FIG. 2 is an exemplary circuit diagram for explaining a magnetic memory device according to some embodiments. FIG. 3 is an exemplary circuit diagram for illustrating a memory cell according to some embodiments. FIG. 4 is an exemplary circuit diagram for explaining an OTP cell according to some embodiments. FIG. 5 is a diagram illustrating the resistance of memory cells and OTP cells according to some embodiments. FIG. 6 is a flowchart illustrating the reading operation of an OTP cell according to some embodiments. FIG. 7 is a diagram illustrating the reading operation of an OTP cell according to some embodiments. FIG. 8 is a diagram illustrating a read operation of a memory cell according to some embodiments. FIG. 9 is a flowchart illustrating the reading operation of an OTP cell according to some embodiments. FIG. 10 is a diagram illustrating the reading operation of an OTP cell according to some embodiments. FIG. 11 is a diagram illustrating a read operation of a memory cell according to some embodiments. Figure 12 is a diagram illustrating the reading operation of an OTP cell. FIGS. 13 and FIGS. 14 are drawings for explaining the operation of a magnetic memory device according to some embodiments. FIG. 15 is a flowchart illustrating the reading operation of an OTP cell according to some embodiments. FIG. 16 is an exemplary circuit diagram for illustrating a magnetic memory device according to some embodiments. FIG. 17 is an exemplary circuit diagram for illustrating a magnetic memory device according to some embodiments. FIG. 18 is an exemplary circuit diagram for illustrating a magnetic memory device according to some embodiments. FIG. 1 is an exemplary block diagram of a magnetic memory device according to some embodiments. Referring to FIG. 1, a magnetic memory device according to some embodiments may include a cell array (10), a row decoder (20), a column decoder (30), a write driver (40), a sensing circuit (50), a source line driver (60), an input/output circuit (70), and control logic (80). The cell array (10) may include a plurality of memory blocks. The memory blocks include a memory cell array (11) and an OTP cell array (12). The memory cell array (11) includes a plurality of memory cells connected to word lines (WL) and bit lines (BL). The OTP cell array (12) includes a plurality of OTP cells connected to word lines (WL) and bit lines (BL). The memory cells and the OTP cells may be configured to store data. The memory cells and the OTP cells may include, for example, a variable resistor element in which the value of the stored data is determined according to a resistance value, such as a magnetic tunnel junction (MTJ) element. For example, the memory cells and the OTP cells may include ReRAM (Resistive RAM), PRAM (Phase Change Random Access Memory), FRAM (Ferroelectric Random Access Memory), etc., and may also include MRAM (Magnetic Random Access Memory) such as STT-MRAM (Spin-Transfer Torque Magnetic Random Access Memory), Spin-RAM (Spin Torque Transfer Magnetization Switching RAM), and SMT-RAM (S