KR-20260067964-A - HEMT device with AlGaN channel layer and manufacturing method of HEMT device

Abstract

The present invention relates to a HEMT device having an aluminum gallium nitride (AlGaN) channel layer and a method for manufacturing a HEMT device, and more specifically, to a HEMT device having an aluminum gallium nitride (AlGaN) channel layer and a method for manufacturing a HEMT device that includes a superlattice layer of a multilayer structure in which aluminum nitride ( AlN ) and aluminum gallium nitride (Al x Ga 1-x N) are repeatedly stacked, thereby relieving stress between the buffer layer and the channel layer and improving device characteristics.

Inventors

• 남옥현
• 정주철
• 박주용
• 이준혁
• 허재진

Assignees

• 한국공학대학교산학협력단

Dates

Publication Date

20260513

Application Date

20250626

Priority Date

20241106

Claims (12)

1. As an aluminum nitride (AlN) buffer-based aluminum gallium nitride (AlGaN) channel HEMT device, Substrate layer; A buffer layer disposed on the above substrate layer and comprising aluminum nitride (AlN); A superlattice layer disposed on the above buffer layer; A channel layer disposed on the superlattice layer and comprising aluminum gallium nitride (Al x Ga 1-x N); and A barrier layer disposed on the above channel layer and comprising aluminum gallium nitride (AlGaN); The above superlattice layer is, A laminated structure comprising a first layer comprising aluminum gallium nitride (Al x Ga 1-x N), and a second layer laminated on the first layer comprising aluminum nitride (AlN); A HEMT device having a multilayer structure in which the above-mentioned stacked structure is repeatedly stacked one or more times.
2. In claim 1, The aluminum gallium nitride (Al x Ga 1-x N) contained in each of the above superlattice layer and channel layer has different x values, and A HEMT device in which the x value of aluminum gallium nitride (Al x Ga 1-x N) included in the superlattice layer is greater than the x value of aluminum gallium nitride (Al x Ga 1-x N) included in the channel layer.
3. In claim 1, The above superlattice layer is a HEMT device in which the above stacked structure is repeatedly stacked 1 to 1000 times.
4. In claim 1, The above substrate layer is a HEMT device in which any one of silicon carbide (4H-SiC), (002) sapphire, (111) silicon (Si), (002) aluminum nitride (AlN) substrate.
5. In claim 1, Each of the above buffer layer, superlattice layer, channel layer, and barrier layer is formed by organometallic chemical vapor deposition (MOCVD), and A HEMT device formed at a growth rate of 0.01 to 1000 μm/hr under pressure conditions of 0 to 760 torr and temperature conditions of 500 to 1300℃.
6. In claim 2, The x value of the aluminum gallium nitride (Al x Ga 1-x N) included in the above superlattice layer is 0.1 to 0.9, and A HEMT device in which the x value of aluminum gallium nitride (Al x Ga 1-x N) included in the channel layer is 0.05 to 0.8.
7. In claim 1, The above HEMT device further includes an electrode disposed on the barrier layer, and A HEMT device comprising the above electrodes including a source, a gate formed spaced apart from the source, and a drain formed spaced apart from the source and the gate.
8. In claim 1, A HEMT device having a superlattice layer thickness of 50 nm to 10 μm.
9. A method for manufacturing an aluminum nitride (AlN) buffer-based aluminum gallium nitride (AlGaN) channel HEMT device, Substrate layer preparation step for preparing a substrate layer; A buffer layer placement step of placing a buffer layer containing aluminum nitride (AlN) on the substrate layer; A superlattice layer placement step of placing a superlattice layer on the above buffer layer; A channel layer placement step of placing a channel layer comprising aluminum gallium nitride (Al x Ga 1-x N) on the superlattice layer; and A barrier layer placement step comprising placing a barrier layer containing aluminum gallium nitride (AlGaN) on the above channel layer; The above superlattice layer arrangement step is, A step of forming a laminated structure comprising a first layer comprising aluminum gallium nitride (Al x Ga 1-x N), and a second layer laminated on the first layer comprising aluminum nitride (AlN); and A method for manufacturing a HEMT device, comprising: a repetitive stacking step of forming a multilayer structure by repeatedly stacking the above-mentioned stacked structure one or more times.
10. In claim 9, A method for manufacturing a HEMT device, wherein the above-mentioned repetitive stacking step involves repeatedly stacking the above-mentioned stacked structure 1 to 1000 times.
11. In claim 9, The method for manufacturing the HEMT device further includes an electrode placement step of placing an electrode on the barrier layer; and A method for manufacturing a HEMT device, wherein the electrode comprises a source, a gate formed spaced apart from the source, and a drain formed spaced apart from the source and the gate.
12. In claim 9, A method for manufacturing a HEMT device, wherein the superlattice layer arrangement step is formed such that the superlattice layer has a thickness of 50 nm to 10 μm.

Description

HEMT device having an aluminum gallium nitride (AlGaN) channel layer and manufacturing method of HEMT device The present invention relates to a HEMT device having an aluminum gallium nitride (AlGaN) channel layer and a method for manufacturing a HEMT device, and more specifically, to a HEMT device having an aluminum gallium nitride (AlGaN) channel layer and a method for manufacturing a HEMT device that includes a superlattice layer of a multilayer structure in which aluminum nitride ( AlN ) and aluminum gallium nitride (Al x Ga 1-x N) are repeatedly stacked, thereby relieving stress between the buffer layer and the channel layer and improving device characteristics. HEMT (High Electron Mobility Transistor) devices are devices that form a heterojunction to enable electrons to have high mobility, and are more advantageous for high-frequency and high-power applications than general MOSFET (Metal Oxide Semiconductor Field Effect Transistor). However, conventional HEMT devices are prone to stress generation due to lattice mismatch caused by differences in lattice constants when forming a channel layer on top of a buffer layer. When stress occurs, defects such as dislocations are generated in the channel layer, ultimately leading to a degradation of the channel layer's crystallinity and morphology, which in turn causes a problem of reduced device performance. In other words, there is a need for a HEMT device and a manufacturing method that can prevent the degradation of crystallinity and morphology of the channel layer by relieving stress between the buffer layer and the channel layer. FIG. 1 schematically illustrates a HEMT device and a superlattice layer according to one embodiment of the present invention. FIG. 2 schematically illustrates the manufacturing steps of a HEMT device according to one embodiment of the present invention. FIG. 3 schematically illustrates the manufacturing steps of a superlattice layer according to one embodiment of the present invention. FIG. 4 schematically illustrates a HEMT device that does not include a superlattice layer according to one embodiment of the present invention. FIG. 5 schematically illustrates a HEMT device including a superlattice layer according to one embodiment of the present invention. FIG. 6 schematically illustrates an AFM image of the channel layer of a HEMT device according to one embodiment of the present invention. FIG. 7 schematically illustrates the XRD measurement results of the channel layer of a HEMT device according to one embodiment of the present invention. FIG. 8 schematically illustrates the RSM scan results of the channel layer of a HEMT device according to one embodiment of the present invention. FIG. 9 schematically illustrates the current-voltage curve of a HEMT device according to one embodiment of the present invention. FIG. 10 schematically illustrates the behavior of a HEMT device according to one embodiment of the present invention as a function of voltage. Hereinafter, various embodiments and/or aspects are disclosed with reference to the drawings. For illustrative purposes, numerous specific details are disclosed in the following description to aid in a general understanding of one or more aspects. However, it will also be recognized by those skilled in the art that these aspects may be practiced without such specific details. The following description and the accompanying drawings describe specific exemplary aspects of one or more aspects in detail. However, these aspects are exemplary, and some of the various methods in the principles of the various aspects may be used, and the description is intended to include all such aspects and their equivalents. In addition, various aspects and features will be presented by a system that may include multiple devices, components and/or modules, etc. It should also be understood and recognized that various systems may include additional devices, components and/or modules, etc., and/or may not include all of the devices, components, modules, etc. discussed in relation to the drawings. As used herein, terms such as "examples," "examples," "aspects," "examples," etc., may not be interpreted as implying that any aspect or design described is better or more advantageous than other aspects or designs. Additionally, the terms “comprising” and/or “comprising” should be understood to mean that the relevant feature and/or component is present, but not to exclude the presence or addition of one or more other features, components and/or groups thereof. Additionally, terms including ordinal numbers, such as first, second, etc., may be used to describe various components, but said components are not limited by said terms. Such terms are used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be named the second component, and similarly, the second component may be named the first component. The te