KR-20260067965-A - Method for forming HEMT device electrodes with AlGaN channel layer

KR20260067965AKR 20260067965 AKR20260067965 AKR 20260067965AKR-20260067965-A

Abstract

The present invention relates to a method for forming electrodes of a HEMT device having an AlGaN channel layer, and more specifically, to a method for forming electrodes of a HEMT device having an AlGaN channel layer by partially etching the upper surface of the HEMT device to regrow a first ohmic layer, forming a second ohmic layer in contact with the first ohmic layer and a barrier layer, and heat-treating to lower the contact resistance of the electrodes and improve the electrical performance of the device.

Inventors

남옥현
정주철
박주용
이준혁
허재진

Assignees

한국공학대학교산학협력단

Dates

Publication Date: 20260513
Application Date: 20250626
Priority Date: 20241106

Claims (15)

As a method for forming electrodes of a compound semiconductor transistor, A semiconductor device formation step comprising: a substrate layer; a buffer layer disposed on the substrate layer and comprising aluminum nitride (AlN); a channel layer disposed on the buffer layer and comprising gallium aluminum nitride (Al x Ga 1 -x N); a spacer layer disposed on the channel layer; and a barrier layer disposed on the spacer layer and comprising gallium aluminum nitride (Al x Ga 1-x N); An etching pattern formation step of forming an etching mask pattern on the above barrier layer; An etching step of forming an etched surface by etching along the above etching mask pattern; A first ohmic layer formation step of forming a first ohmic layer on the above-mentioned etched exposed surface; A second ohmic layer forming step of forming a second ohmic layer to cover a portion of the upper surface of the barrier layer and the upper surface of the first ohmic layer; and A gate formation step comprising forming a gate electrode disposed on the barrier layer and spaced apart from the second ohmic layer; A method for forming an electrode in which the upper surface of the first ohmic layer is formed to protrude upward from the upper surface of the barrier layer.
In claim 1, An electrode formation method in which the pattern area of the etching mask pattern corresponds to 5 to 95% of the total area of the second ohmic layer.
In claim 1, The above etching mask pattern is one of a hole pattern, a stripe pattern, a square pattern, or a hexagonal pattern, in a method for forming an electrode.
In claim 1, The above semiconductor device is a high electron mobility transistor (HEMT) device, and the electrode formation method.
In claim 1, A method for forming an electrode, wherein the first ohmic layer comprises aluminum gallium nitride (Al y Ga 1-y N).
In claim 5, The y-value of the aluminum gallium nitride (Al y Ga 1-y N) included in the first ohmic layer is 0 to 0.99, and A method for forming an electrode, wherein the x value of the aluminum gallium nitride (Al x Ga 1-x N) included in the barrier layer is smaller than the value of the above barrier layer.
In claim 1, The electrode forming method further comprises a rapid thermal treatment step of rapidly thermally treating the semiconductor device, on which the first ohmic layer and the second ohmic layer are each formed, at a temperature condition of 300 to 1200°C after the second ohmic layer forming step is performed.
In claim 7, The above rapid heat treatment step is performed in a nitrogen atmosphere for 1 to 600 seconds, a method for forming an electrode.
In claim 1, The above etching step is, A method for forming an electrode, comprising a detailed step of a first etching exposure step of etching the barrier layer corresponding to the etching mask pattern.
In claim 9, The above etching step is, A method for forming an electrode, further comprising a detailed step of a second etching exposure step in which the spacer layer is further etched to correspond to the etching mask pattern after the first etching exposure step is performed.
In claim 10, The above etching step is, A method for forming an electrode, further comprising a detailed step of a third etching exposure step in which, after the second etching exposure step is performed, the upper side of the channel layer is further etched to correspond to the etching mask pattern.
In claim 1, The aluminum gallium nitride (Al x Ga 1-x N) included in each of the above channel layer and barrier layer has different x values, and A method for forming an electrode, wherein the x value of the aluminum gallium nitride (Al x Ga 1-x N) included in the barrier layer is greater than the x value of the aluminum gallium nitride (Al x Ga 1-x N) included in the channel layer.
In claim 5, A method for forming an electrode in which the first ohmic layer is doped with n-type.
In claim 1, The second ohmic layer comprises one or more of titanium (Ti), aluminum (Al), nickel (Ni), gold (Au), chromium (Cr), zirconium (Zr), and tantalum (Ta), and A method for forming an electrode that forms an ohmic contact with the first ohmic layer.
In claim 1, A method for forming an electrode, wherein the thickness of the channel layer is 30 to 3000 nm.

Description

Method for forming HEMT device electrodes with AlGaN channel layer The present invention relates to a method for forming electrodes of a HEMT device having an AlGaN channel layer, and more specifically, to a method for forming electrodes of a HEMT device having an AlGaN channel layer by partially etching the upper surface of the HEMT device to regrow a first ohmic layer, forming a second ohmic layer in contact with the first ohmic layer and a barrier layer, and heat-treating to lower the contact resistance of the electrodes and improve the electrical performance of the device. HEMT (High Electron Mobility Transistor) devices are devices that form a heterojunction to enable electrons to have high mobility, and are more advantageous for high-frequency and high-power applications than general MOSFET (Metal Oxide Semiconductor Field Effect Transistor). Conventional HEMT devices containing aluminum gallium nitride (Al x Ga 1-x N) have a structure in which a metal electrode is formed on top of a barrier layer. However, conventional HEMT devices have a problem in which the electrical performance of the device is degraded due to heat generation and voltage drop caused by contact resistance occurring at the interface between the barrier layer and the metal electrode. Accordingly, there is a need for an electrode formation method for HEMT devices that can improve device performance by reducing contact resistance occurring at the electrode interface. FIG. 1 schematically illustrates the formation steps of a HEMT device according to one embodiment of the present invention. FIG. 2 schematically illustrates a method for forming electrodes of a HEMT device according to one embodiment of the present invention. FIG. 3 schematically illustrates a HEMT element according to one embodiment of the present invention. FIG. 4 schematically illustrates the detailed steps of an etching step according to one embodiment of the present invention. FIG. 5 schematically illustrates an example of an etched exposed surface formed by an electrode forming method according to one embodiment of the present invention. FIG. 6 schematically illustrates an electrode formation method according to one embodiment of the present invention. FIG. 7 schematically illustrates a rapid heat treatment step according to one embodiment of the present invention. FIG. 8 schematically illustrates a plan view of a HEMT element according to one embodiment of the present invention. FIG. 9 schematically illustrates the contact resistance of a HEMT element according to one embodiment of the present invention. FIG. 10 schematically illustrates the voltage-current curve of a HEMT device according to one embodiment of the present invention. Hereinafter, various embodiments and/or aspects are disclosed with reference to the drawings. For illustrative purposes, numerous specific details are disclosed in the following description to aid in a general understanding of one or more aspects. However, it will also be recognized by those skilled in the art that these aspects may be practiced without such specific details. The following description and the accompanying drawings describe specific exemplary aspects of one or more aspects in detail. However, these aspects are exemplary, and some of the various methods in the principles of the various aspects may be used, and the description is intended to include all such aspects and their equivalents. In addition, various aspects and features will be presented by a system that may include multiple devices, components and/or modules, etc. It should also be understood and recognized that various systems may include additional devices, components and/or modules, etc., and/or may not include all of the devices, components, modules, etc. discussed in relation to the drawings. As used herein, terms such as "examples," "examples," "aspects," "examples," etc., may not be interpreted as implying that any aspect or design described is better or more advantageous than other aspects or designs. Additionally, the terms “comprising” and/or “comprising” should be understood to mean that the relevant feature and/or component is present, but not to exclude the presence or addition of one or more other features, components and/or groups thereof. Additionally, terms including ordinal numbers, such as first, second, etc., may be used to describe various components, but said components are not limited by said terms. Such terms are used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be named the second component, and similarly, the second component may be named the first component. The term "and/or" includes a combination of a plurality of related described items or any of a plurality of related described items. Furthermore, in the embodiments of the present invention, all terms used herein, including technical or scientific terms, unless ot