US-12616430-B2 - Electric circuitry for baseline extraction in a photon counting system

US12616430B2US 12616430 B2US12616430 B2US 12616430B2US-12616430-B2

Abstract

An electric circuitry for baseline extraction in a photon counting system includes an input signal integrity detector to determine an integrity of an input signal for baseline extraction, a sampling circuit to sample the input signal during a sampling time, and to provide a sampled version of the input signal, a signal processing circuit to process the sampled version of the input signal, and a signal processing controller to control the signal processing circuit. The input signal integrity detector is configured to determine the integrity of the input signal for baseline extraction by evaluating the input signal or the sampled version of the input signal. The signal processing controller is configured to control the signal processing circuit so that the sampled version of the input signal is processed, when the integrity of the input signal for baseline extraction is determined by the input signal integrity detector at least during the sampling time.

Inventors

Fridolin Michel

Assignees

AMS INTERNATIONAL AG

Dates

Publication Date: 20260505
Application Date: 20211202
Priority Date: 20201209

Claims (15)

1 . An electric circuitry for a baseline extraction in a photon counting system, comprising: an input terminal to apply an input signal, an input signal integrity detector to determine an integrity of the input signal for the baseline extraction, a sampling circuit to sample the input signal during a sampling time, and to provide a sampled version of the input signal, a signal processing circuit to process the sampled version of the input signal, and a signal processing controller to control the signal processing circuit, wherein the input signal integrity detector is configured to determine the integrity of the input signal for the baseline extraction by evaluating the input signal or the sampled version of the input signal, and wherein the signal processing controller is configured to control the signal processing circuit so that the sampled version of the input signal is processed, when the integrity of the input signal for the baseline extraction is determined by the input signal integrity detector at least during the sampling time.
2 . The electric circuitry of claim 1 , wherein the input signal integrity detector comprises a range checking circuit, and wherein the range checking circuit is configured to provide an error flag signal, when the range checking circuit detects that a level of the input signal or a level of the sampled version of the input signal is out of a monitoring range.
3 . The electric circuitry of claim 2 , further comprising: a trigger controller having an input side to receive a clock signal and a retrigger signal, and having an output side to provide a start signal and a stop signal, wherein the trigger controller is configured to provide the start signal, when the trigger controller receives the clock signal or the retrigger signal at the input side, and wherein the trigger controller is configured to provide the stop signal time-delayed with respect to the start signal.
4 . The electric circuitry of claim 3 , wherein the signal processing controller has an input side to receive the start signal, the stop signal, and the error flag signal, wherein the signal processing controller has an output side to provide a signal processing control signal to control the signal processing circuit, when the signal processing controller receives no error flag signal between an application of the start signal and an application of the stop signal at the input side of the signal processing controller, and wherein the signal processing circuit is configured to process the sampled version of the input signal, when the signal processing circuit receives the signal processing control signal provided by signal processing controller.
5 . The electric circuitry of claim 4 , wherein the signal processing controller is configured to provide the retrigger signal at the output side of the signal processing controller to retrigger the trigger controller for generating the start signal and the time-delayed stop signal, when the signal processing controller receives the error flag signal between the application of the start signal and the application of the stop signal at the input side of the signal processing controller.
6 . The electric circuitry of claim 5 , wherein the input signal integrity detector comprises a range controller being configured to adjust the monitoring range, and wherein the range controller is configured to adjust the monitoring range in dependence on a frequency with which the retrigger signal is generated by the signal processing controller.
7 . The electric circuitry of claim 3 , wherein the range checking circuit has a signal delay time between receiving the input signal or the sampled version of the input signal and providing the error flag signal, and wherein the trigger controller is configured such that a time between a generation of the start signal and a generation of the stop signal is larger than a sum of the signal delay time and the sampling time.
8 . The electric circuitry of claim 3 , further comprising: a sample controller having an input side to receive the start signal or a second clock signal, and having an output side to provide a sampling control signal to control the sampling circuit for sampling the input signal in response to the start signal or the second clock signal.
9 . The electric circuitry of claim 2 , wherein the signal processing controller has an input side to receive the error flag signal provided by the range checking circuit, wherein the signal processing controller has an output side to provide a signal processing control signal to control the signal processing circuit, when the signal processing controller receives no error flag signal, and wherein the signal processing circuit is configured to process the sampled version of the input signal, when the signal processing circuit receives the signal processing control signal provided by the signal processing controller.
10 . The electric circuitry of claim 2 , wherein the signal processing controller is configured to provide a retrigger signal at an output side of the signal processing controller, when the signal processing controller receives the error flag signal provided by the range checking circuit, wherein the input signal integrity detector comprises a range controller being configured to adjust the monitoring range, and wherein the range controller is configured to adjust the monitoring range in dependence on a frequency with which the retrigger signal is generated by the signal processing controller.
11 . The electric circuitry of claim 2 , wherein the range checking circuit comprises a first sub-circuit being configured to provide the error flag signal, when the first sub-circuit detects that a level of the input signal is out of a first threshold of the monitoring range, and wherein the range checking circuit comprises a second sub-circuit being configured to provide the error flag signal, when the second sub-circuit detects that a level of the sampled version of the input signal is out of a second threshold of the monitoring range.
12 . The electric circuitry of claim 1 , wherein the signal processing circuit is configured to generate an output signal based on averaging of an amount of sampled versions of the input signal, and/or on weighted signal processing of the sampled version of the input signal, wherein the weighted signal processing is performed by different weightings in dependence on different monitoring ranges.
13 . A photon counting circuitry, comprising: a photon detector having a photon sensitive area, the photon detector being configured to generate a current signal in dependence on an impact of a photon on the photon sensitive area, a front-end electronic circuitry to receive the current signal and to provide a voltage signal in response to the current signal, an energy discriminator being connected to the front-end electronic circuitry, the energy discriminator being configured to generate a digital signal in dependence on a comparison of a level of the voltage signal with at least one threshold value, and the electric circuitry for a baseline extraction of claim 1 , and wherein the energy discriminator is configured to adjust the at least one threshold value in dependence on an output signal provided by the electric circuitry for the baseline extraction.
14 . A photon counting circuitry, comprising: a photon detector having a photon sensitive area, the photon detector being configured to generate a current signal in dependence on an impact of a photon on the photon sensitive area, a front-end electronic circuitry to receive the current signal and to provide a voltage signal in response to the current signal, an energy discriminator being connected to the front-end electronic circuitry, the energy discriminator being configured to generate a digital signal in dependence on a comparison of a level of the voltage signal with at least one threshold value, and a baseline restoration circuit being connected between an input side and an output side of the front-end electronic circuitry, and wherein the baseline restoration circuit comprises the electric circuitry for the baseline extraction of claim 1 .
15 . A device for medical diagnostics, comprising: a photon counting circuitry comprising: a photon detector having a photon sensitive area, the photon detector being configured to generate a current signal in dependence on an impact of a photon on the photon sensitive area, a front-end electronic circuitry to receive the current signal and to provide a voltage signal in response to the current signal, an energy discriminator being connected to the front-end electronic circuitry, the energy discriminator being configured to generate a digital signal in dependence on a comparison of a level of the voltage signal with at least one threshold value, and an electric circuitry for a baseline extraction comprising: an input terminal to apply an input signal, an input signal integrity detector to determine an integrity of the input signal for the baseline extraction, a sampling circuit to sample the input signal during a sampling time, and to provide a sampled version of the input signal, a signal processing circuit to process the sampled version of the input signal, and a signal processing controller to control the signal processing circuit, wherein the input signal integrity detector is configured to determine the integrity of the input signal for the baseline extraction by evaluating the input signal or the sampled version of the input signal, and wherein the signal processing controller is configured to control the signal processing circuit so that the sampled version of the input signal is processed, when the integrity of the input signal for the baseline extraction is determined by the input signal integrity detector at least during the sampling time, wherein the energy discriminator is configured to adjust the at least one threshold value in dependence on an output signal provided by the electric circuitry for the baseline extraction, and wherein the device is configured as an X-ray apparatus or a computed tomography scanner.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS The present application is the national stage entry of International Patent Application No. PCT/EP2021/083967, filed on Dec. 2, 2021, and published as WO 2022/122545 A1 on Jun. 16, 2022, which claims priority to German Application No. 10 2020 132 798.6, filed on Dec. 9, 2020, the disclosures of all of which are incorporated by reference herein in their entireties. TECHNICAL FIELD The disclosure relates to an electric circuitry for baseline extraction in a photon counting system, such as a multi-energy spectral CT (computed tomography). The disclosure further relates to a photon counting circuitry, and a device for medical diagnostics. BACKGROUND In a conventional X-ray sensor, an indirect detection principle is used to detect a photon which passes easily through soft tissues of the body of a patient. Indirect detectors comprise a scintillator to convert X-rays to visible light which is captured by a photodetector or photodiode to provide an electrical signal in response to the X-rays impinging on the material of the scintillator. In a photon counting system, a direct detection principle is used, which allows to detect and count single photon events in order to obtain intensity and spectral information. Whereas in a classical image or X-ray sensor system only the total input intensity is measured, in a photon counting system the photon energy can also be extracted because photons are detected individually. FIG. 1 shows a block diagram of a photon counting circuitry 2, comprising a front-end electronic circuitry 10, a photon detector 20, and an energy discriminator 30. The photon detector 20 generates a transient current pulse Ipulse caused by a photon impinging a photosensitive area 21 of the photon detector 20. Detection of single photons is enabled by a special sensor material of the photosensitive area 21 (typically CdTe or CdZnTe for X-ray conversion), which converts photons into current pulses Ipulse. These current pulses Ipulse are received at an input node I10 of the front-end electronic circuitry 10 and are converted to voltage pulses Vpulse generated at an output node O10 of the front-end electronic circuitry 10. The height of the output voltage peak is proportional to the photon energy, thus containing spectral information. Digitization of the spectral information (output pulse height) can be performed using the energy discriminator 30, for example a flash ADC, which comprises several comparators with different thresholds Vth1, . . . , VthN−1, VthN. The output signals of the comparators are then individually counted in order to obtain a spectral distribution. The static output voltage of the front-end electronic circuitry 10 in the absence of current pulses at its input is called baseline signal and serves as a reference for the discrimination of the pulse heights by the comparators of the energy discriminator 30. As a consequence, changes of the baseline have a direct impact on the observed count rate and pulse energy measurement. In the case of a DC path from the input node I10 of the front-end electronic circuitry 10 to the output of the photon detector 20, leakage current can directly affect baseline stability, so that either the energy discriminator 30 must be dynamically referenced to the changing baseline or the baseline itself must be stabilized in a feedback loop (baseline restoration). In both approaches accurate extraction of the baseline in the presence of pulse activity at the output node O10 of the front-end electronic circuitry 10 is a major challenge. There is a need to provide an electric circuitry for baseline extraction in a photon counting system which enables baseline extraction with high accuracy and high tracking speed. Furthermore, there is a desire to provide a photon counting circuitry having high performance regarding counting rates and energy resolution. Moreover, there is a desire to provide a device for medical diagnostics capable of operating at very high count rates. SUMMARY An electric circuitry which allows baseline extraction in a photon counting system with high accuracy is specified herein. The electric circuitry for baseline extraction comprises an input terminal to apply an input signal, an input signal integrity detector to determine an integrity of the input signal for baseline extraction, and a sampling circuit to sample the input signal during a sampling time, and to provide a sampled version of the input signal. The electric circuitry for baseline extraction further comprises a signal processing circuit to process the sampled version of the input signal, and a signal processing controller to control the signal processing circuit. The input signal integrity detector is configured to determine the integrity of the input signal for baseline extraction by evaluating the input signal or the sampled version of the input signal. The signal processing controller is configured to control the signal processing circuit so that