US-12618880-B2 - Ultra-low-power front end for beyond-the-rails voltage sensing

Abstract

A system may include a passive floating attenuator configured to receive an analog physical quantity and attenuate the analog physical quantity to a floating attenuated signal defined by voltage nodes other than the voltage nodes of the analog physical quantity, an anti-aliasing filter configured to filter the floating attenuated signal to generate a filtered attenuated signal, and a switched-capacitor sampling circuit comprising a plurality of switches configured to sample the filtered attenuated signal.

Inventors

• Arashk NOROUZPOURSHIRAZI
• Stephen T. Hodapp
• Ravi K. Kummaraguntla
• Axel Thomsen

Assignees

• CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.

Dates

Publication Date

20260505

Application Date

20220810

Claims (14)

1. 1 . A system comprising: a passive floating attenuator configured to receive an analog physical quantity and attenuate the analog physical quantity to a floating attenuated signal defined by voltage nodes other than the voltage nodes of the analog physical quantity; an anti-aliasing filter configured to filter the floating attenuated signal to generate a filtered attenuated signal; and a switched-capacitor sampling circuit comprising a plurality of switches configured to sample the filtered attenuated signal.
2. 2 . The system of claim 1 , wherein the passive floating attenuator comprises a resistive divider.
3. 3 . The system of claim 1 , wherein the switched-capacitor sampling circuit comprises a common-mode insensitive sampling circuit insensitive to a common mode of the filtered attenuated signal.
4. 4 . The system of claim 1 , further comprising a bootstrap generation network electrically coupled to the plurality of switches and configured to: generate a bootstrap sampling clock for controlling the plurality of switches; and generate a floating supply voltage for the bootstrap sampling clock based on the filtered attenuated signal.
5. 5 . The system of claim 4 , further comprising a unity gain buffer configured to buffer the filtered attenuated signal used for generating the bootstrap sampling clock in order to isolate an output of the anti-aliasing filter from the bootstrap generation network.
6. 6 . The system of claim 5 wherein the unity gain buffer is powered from a floating supply that is derived from and tracks a highest-voltage beyond-the-rails component of the analog physical quantity.
7. 7 . The system of claim 1 , wherein the analog physical quantity is a voltage.
8. 8 . A method comprising: attenuating, with a passive floating attenuator, an analog physical quantity to a floating attenuated signal defined by voltage nodes other than the voltage nodes of the analog physical quantity; filtering, with an anti-aliasing filter, the floating attenuated signal to generate a filtered attenuated signal; and sampling the filtered attenuated signal with a switched-capacitor sampling circuit comprising a plurality of switches.
9. 9 . The method of claim 8 , wherein the passive floating attenuator comprises a resistive divider.
10. 10 . The method of claim 8 , wherein the switched-capacitor sampling circuit comprises a common-mode insensitive sampling circuit insensitive to a common mode of the filtered attenuated signal.
11. 11 . The method of claim 8 , further comprising: generating, with a bootstrap generation network electrically coupled to the plurality of switches, a bootstrap sampling clock for controlling the plurality of switches; and generating, with the bootstrap generation network, a floating supply voltage for the bootstrap sampling clock based on the filtered attenuated signal.
12. 12 . The method of claim 11 , further comprising buffering, with a unity gain buffer, the filtered attenuated signal used for generating the bootstrap sampling clock in order to isolate an output of the anti-aliasing filter from the bootstrap generation network.
13. 13 . The method of claim 12 , wherein the unity gain buffer is powered from a floating supply that is derived from and tracks a highest-voltage beyond-the-rails component of the analog physical quantity.
14. 14 . The method of claim 8 , wherein the analog physical quantity is a voltage.

Description

FIELD OF DISCLOSURE The present disclosure relates in general to methods and systems for implementing an analog front end for voltage sensing configured to sense input signals higher in magnitude than available supply rails. BACKGROUND Delta-sigma modulators are typically used in electronic circuits such as analog-to-digital converters (ADCs). Often, such ADCs employ an anti-aliasing filter to filter an analog input signal that may be sampled by a sampling network at the input of the delta-sigma modulator for conversion into an equivalent digital signal by the ADC. An example of such a sampling network is a switched capacitor circuit. As in many applications, it may be desirable to minimize power consumption in ADCs and other circuits, especially as ADCs may be used in battery-operated devices such as smartphones and tablets. Traditional sensing of a voltage prior to conversion by an ADC involves a continuous-time analog front end to attenuate and low-pass filter the sensed voltage prior to digitizing the signal by the ADC. However, a continuous-time analog front end inherently consumes static power, which makes a continuous-time analog front end an unsuitable choice for ultra-low power consumption. SUMMARY In accordance with the teachings of the present disclosure, the disadvantages and problems associated with existing approaches for implementing analog front ends may be reduced or eliminated. In accordance with embodiments of the present disclosure, a system may include a passive floating attenuator configured to receive an analog physical quantity and attenuate the analog physical quantity to a floating attenuated signal defined by voltage nodes other than the voltage nodes of the analog physical quantity, an anti-aliasing filter configured to filter the floating attenuated signal to generate a filtered attenuated signal, and a switched-capacitor sampling circuit comprising a plurality of switches configured to sample the filtered attenuated signal. In accordance with these and other embodiments of the present disclosure, a method may include attenuating, with a passive floating attenuator, an analog physical quantity to a floating attenuated signal defined by voltage nodes other than the voltage nodes of the analog physical quantity. The method may also include filtering, with an anti-aliasing filter, the floating attenuated signal to generate a filtered attenuated signal. The method may additionally include sampling the filtered attenuated signal with a switched-capacitor sampling circuit comprising a plurality of switches. Technical advantages of the present disclosure may be readily apparent to one having ordinary skill in the art from the figures, description and claims included herein. The objects and advantages of the embodiments will be realized and achieved at least by the elements, features, and combinations particularly pointed out in the claims. It is to be understood that both the foregoing general description and the following detailed description are examples and explanatory and are not restrictive of the claims set forth in this disclosure. BRIEF DESCRIPTION OF THE DRAWINGS A more complete understanding of the present embodiments and advantages thereof may be acquired by referring to the following description taken in conjunction with the accompanying drawings, in which like reference numbers indicate like features, and wherein: FIG. 1 illustrates a circuit diagram of an example analog front end, in accordance with embodiments of the present disclosure; and FIG. 2 illustrates a circuit diagram of an example transistor-level implementation of a bootstrap generation circuit, in accordance with embodiments of the present disclosure. DETAILED DESCRIPTION The description below sets forth example embodiments according to this disclosure. Further example embodiments and implementations will be apparent to those having ordinary skill in the art. Further, those having ordinary skill in the art will recognize that various equivalent techniques may be applied in lieu of, or in conjunction with, the embodiment discussed below, and all such equivalents should be deemed as being encompassed by the present disclosure. FIG. 1 illustrates a circuit diagram of an example analog front end 100, in accordance with embodiments of the present disclosure. As shown in FIG. 1, analog front end 100 may include a floating attenuator 102, passive anti-aliasing filter 104, and a common-mode insensitive sampling circuit 106. Floating attenuator 102 may include any suitable system, device, or apparatus configured to receive a differential input voltage Vin,diff=Vin,p−Vin,n and attenuate such voltage to generate an attenuated voltage smaller than differential input voltage Vin,diff and such that the attenuated voltage is “floating” in the sense that the attenuated voltage is formed between two electrical nodes other than voltage nodes of differential input voltage Vin,diff, and that the common-mode of the attenuated vol