US-12618897-B2 - Test apparatus for semiconductor device and method of manufacturing semiconductor device

US12618897B2US 12618897 B2US12618897 B2US 12618897B2US-12618897-B2

Abstract

Provided is a test apparatus for a semiconductor device which enhances the reliability of a test on electrical characteristics. The test apparatus includes a stage, a probe holder, probes, a wind protection wall, and a gas supply part. The stage is capable of holding a semiconductor wafer in which the semiconductor device is formed. The probe holder is disposed above the stage. The probes each include a tip contactable with the semiconductor device, and are held by the probe holder. The wind protection wall circumferentially surrounds the probes. The gas supply part is disposed outside the wind protection wall. The gas supply part supplies gas in a direction toward the stage. Each of the probes includes an inner part closer to a base end than to the tip. The inner parts are contained in a wind protection space surrounded by the wind protection wall.

Inventors

Takuya Yoshimura

Assignees

MITSUBISHI ELECTRIC CORPORATION

Dates

Publication Date: 20260505
Application Date: 20240116
Priority Date: 20230413

Claims (17)

1 . A test apparatus for a semiconductor device, the test apparatus comprising: a stage capable of holding a semiconductor wafer in which the semiconductor device is formed; a probe holder above the stage; a plurality of probes each including a tip contactable with the semiconductor device, the plurality of probes being held by the probe holder; a wind protection wall circumferentially surrounding the plurality of probes; and a gas supply part outside the wind protection wall, the gas supply part including a gas path provided in a direction toward the stage and supplying gas through the gas path, each of the plurality of probes including an inner part closer to a base end than to the tip, wherein the inner parts are contained in a wind protection space surrounded by the wind protection wall, and the wind protection wall isolates the wind protection space from the gas path.
2 . The test apparatus according to claim 1 , further comprising a plate including a plurality of through holes through which the plurality of probes pass so that the respective tips protrude from the plurality of through holes, wherein the wind protection space is surrounded by the probe holder, the plate, and the wind protection wall.
3 . The test apparatus according to claim 1 , further comprising an enclosed part outside the wind protection wall, the enclosed part further surrounding the plurality of probes, wherein the gas supply part includes: a gas inlet on the probe holder, the gas inlet being located between the wind protection wall and the enclosed part in a plan view; and a gas path between the wind protection wall and the enclosed part, the gas path extending in the direction toward the stage.
4 . The test apparatus according to claim 1 , wherein the plurality of probes are a plurality of thin wire probes.
5 . The test apparatus according to claim 1 , further comprising a tester electrically connected to the plurality of probes through the probe holder, the tester applying a voltage to the semiconductor device through the plurality of probes and testing electrical characteristics of the semiconductor device.
6 . The test apparatus according to claim 2 , wherein a lower end of the wind protection wall is located below the plate, and is located above the tips of the plurality of probes.
7 . The test apparatus according to claim 1 , further comprising a filler encapsulated in the wind protection space, wherein the filler is a sponge or rubber.
8 . A test apparatus for a semiconductor device, the test apparatus comprising: a stage capable of holding a semiconductor wafer in which the semiconductor device is formed; a probe holder above the stage; a plurality of probes each including a tip contactable with the semiconductor device, the plurality of probes being held by the probe holder; a plate including a plurality of through holes through which the plurality of probes pass so that the respective tips protrude from the plurality of through holes; an enclosed part circumferentially surrounding the plate and the plurality of probes; and a gas supply part including a gas pipe between the plate and the enclosed part, the gas supply part supplying gas in a direction toward the stage through the gas pipe, and the gas pipe being provided outside of the plate and the enclosed part.
9 . The test apparatus according to claim 8 , wherein the gas supply part includes a gas inlet and a gas port that are connected to the gas pipe, the gas pipe extends from the probe holder toward the stage, the gas inlet is provided on the probe holder, and is located between the plate and the enclosed part in a plan view, and a height of the gas port from the stage is identical to a height of the plate from the stage.
10 . The test apparatus according to claim 8 , wherein the plurality of probes are a plurality of thin wire probes.
11 . The test apparatus according to claim 8 , further comprising a tester electrically connected to the plurality of probes through the probe holder, the tester applying a voltage to the semiconductor device through the plurality of probes and testing electrical characteristics of the semiconductor device.
12 . A method of manufacturing a semiconductor device, the method comprising: holding, on a stage, a semiconductor wafer in which the semiconductor device is formed; bringing, in contact with the semiconductor device, a tip of each of a plurality of probes held by a probe holder located above the stage; and supplying gas through a gas path, the gas path being provided in a direction toward the stage outside a wind protection wall circumferentially surrounding the plurality of probes, wherein each of the plurality of probes includes an inner part closer to a base end than to the tip, the inner parts are contained in a wind protection space surrounded by the wind protection wall, and the wind protection wall isolates the wind protection space from the gas path.
13 . The method of manufacturing the semiconductor device according to claim 12 , the method further comprising disposing a plate including a plurality of through holes through which the plurality of probes pass so that the respective tips protrude from the plurality of through holes, wherein the wind protection space is surrounded by the probe holder, the plate, and the wind protection wall.
14 . The method of manufacturing the semiconductor device according to claim 12 , wherein the supplying includes injecting the gas into a pressure space between an enclosed part and the semiconductor wafer to apply a pressure to the pressure space, the enclosed part being disposed outside the wind protection wall further to circumferentially surround the plurality of probes, the gas is injected from a gas inlet into the pressure space through a gas path, the gas inlet is provided on the probe holder, and is located between the wind protection wall and the enclosed part in a plan view, and the gas path is provided between the wind protection wall and the enclosed part, the gas path extending in the direction toward the stage.
15 . The method of manufacturing the semiconductor device according to claim 12 , wherein the plurality of probes are a plurality of thin wire probes.
16 . The method of manufacturing the semiconductor device according to claim 12 , further comprising applying a voltage from a tester to the semiconductor device through the plurality of probes and testing electrical characteristics of the semiconductor device, the tester being electrically connected to the plurality of probes through the probe holder.
17 . The method of manufacturing the semiconductor device according to claim 16 , further comprising stopping applying the voltage to the semiconductor device; stopping supplying the gas; and detaching the tip of each of the plurality of probes from the semiconductor device.

Description

BACKGROUND OF THE INVENTION Field of the Invention The present disclosure relates to a test apparatus for a semiconductor device and a method of manufacturing the semiconductor device. Description of the Background Art Test apparatuses for semiconductor devices inspect electrical characteristics of the semiconductor devices. In the inspection, a high voltage is applied to a semiconductor device. When the test apparatus inspects electrical characteristics of a semiconductor device that is a wafer, discharge may occur in the vicinity of the surface of the wafer. The discharge destroys the semiconductor device to be inspected, and semiconductor devices adjacent to the semiconductor device. The prober described in Japanese Patent Application Laid-Open No. 2018-160591 includes an enclosed space disposed to surround a probe. The gas introduced to the enclosed space in the prober prevents discharge in the vicinity of the surface of a wafer. With improvement in performance of the semiconductor devices, the inspection steps require application of high voltages and passage of large currents. To meet such requirements, increasing the number of pins of a probe and using thin wire probes have been proposed. The thin wire probes are, however, prone to deformation with the stress given from outside. The gas injected for inhibiting discharge impinges on the thin wire probes, and deforms the thin wire probes. The deformation of the probes leads to an unreliable contact between the probes and the semiconductor device to be inspected, and decreases the reliability of a test on electrical characteristics. SUMMARY The present disclosure provides a test apparatus for a semiconductor device which reduces deformation of probes and discharge in the vicinity of the surface of a wafer and which enhances the reliability of a test on electrical characteristics. The test apparatus for a semiconductor device according to the present disclosure includes a stage, a probe holder, a plurality of probes, a wind protection wall, and a gas supply part. The stage is capable of holding a semiconductor wafer in which the semiconductor device is formed. The probe holder is disposed above the stage. A plurality of probes each include a tip contactable with the semiconductor device, the plurality of probes being held by the probe holder. The wind protection wall circumferentially surrounds the plurality of probes. The gas supply part is disposed outside the wind protection wall. The gas supply part supplies gas in a direction toward the stage. Each of the plurality of probes includes an inner part closer to a base end than to the tip. The inner parts are contained in a wind protection space surrounded by the wind protection wall. Provided is a test apparatus for a semiconductor device which reduces deformation of probes and discharge in the vicinity of the surface of a wafer and which enhances the reliability of a test on electrical characteristics. These and other objects, features, aspects, and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 illustrates a structure of a test apparatus for a semiconductor device according to Embodiment 1; FIG. 2 is a flowchart illustrating a method of manufacturing the semiconductor device according to Embodiment 1; FIG. 3 illustrates a structure of a test apparatus for a semiconductor device according to Embodiment 2; FIG. 4 illustrates a structure of a test apparatus for a semiconductor device according to Embodiment 3; and FIG. 5 illustrates a structure of a test apparatus for a semiconductor device according to Embodiment 4. DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 FIG. 1 illustrates a structure of a test apparatus 101 for a semiconductor device 20 according to Embodiment 1. The test apparatus 101 includes a stage 1, a probe holder 2, a plurality of probes 3, a contact plate 4, a wind protection wall 5, an enclosed part 6, a gas supply part 7, and a tester 8. The constituent elements other than the tester 8 are illustrated by a cross section in FIG. 1. The test apparatus 101 tests electrical characteristics of the semiconductor device 20. The test apparatus 101 according to Embodiment 1 tests the semiconductor device 20 that is a wafer. The at least one semiconductor device 20 is formed in a semiconductor wafer 21. The semiconductor device 20 to be tested includes an active region 20A and a terminal region 20B. The active region 20A includes a semiconductor element (not illustrated). The terminal region 20B is disposed to surround the active region 20A in a plan view. Examples of the semiconductor element formed on the active region 20A include an insulated-gate bipolar transistor (IGBT), a metal-oxide semiconductor field-effect transistor (MOSFET), and a Schottky barrier diode. Alternatively, the semiconductor element may b