US-12619154-B2 - Lithography techniques for reducing defects

Abstract

A lithography method is described. The method includes forming a resist layer over a substrate, performing a treatment on the resist layer to form an upper portion of the resist layer having a first molecular weight and a lower portion of the resist layer having a second molecular weight less than the first molecular weight, performing an exposure process on the resist layer, and performing a developing process on the resist layer to form a patterned resist layer.

Inventors

• Ming-Hui Weng
• Ching-Yu Chang

Assignees

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Dates

Publication Date

20260505

Application Date

20240528

Claims (20)

1. 1 . A lithography method, comprising: forming a resist layer over a substrate, wherein the resist layer comprises a polymer; performing a treatment on the resist layer to form a first portion of the polymer having a first molecular weight and a second portion of the polymer having a second molecular weight less than the first molecular weight, wherein the first portion is located over the second portion; performing an exposure process on the resist layer; and performing a developing process on the resist layer to form a patterned resist layer.
2. 2 . The lithography method of claim 1 , wherein the exposure process comprises exposing the resist layer to a patterned radiation to form an exposed portion and an unexposed portion located adjacent the exposed portion.
3. 3 . The lithography method of claim 2 , wherein exposed portion and the unexposed portion each includes the first and second portions of the polymer.
4. 4 . The lithography method of claim 2 , wherein the exposed portion of the resist layer has an increased solubility compared to the unexposed portion of the resist layer.
5. 5 . The lithography method of claim 2 , wherein the treatment comprises exposing the resist layer to an electromagnetic wave different from the patterned radiation.
6. 6 . The lithography method of claim 5 , wherein the electromagnetic wave comprises ultraviolet light.
7. 7 . The lithography method of claim 1 , wherein the resist layer further comprises a thermal radical initiator and the treatment comprises heating the resist layer.
8. 8 . The lithography method of claim 7 , further comprising a post exposure bake process after the exposure process and before the developing process, wherein the post exposure bake process comprises heating the resist layer to a first temperature ranging from 120 degrees Celsius to 150 degrees Celsius.
9. 9 . The lithography method of claim 8 , wherein the resist layer is heated to a second temperature less than the first temperature.
10. 10 . A lithography method, comprising: forming a resist layer over a substrate, wherein the resist layer comprises a polymer and a cross-linker; treating the resist layer by a first process, wherein a degree of cross-linking increases from a lower portion of the polymer to an upper portion of the polymer; performing an exposure process on the resist layer by a second process different from the first process; and performing a developing process on the resist layer to form a patterned resist layer.
11. 11 . The lithography method of claim 10 , wherein the first process comprises exposing the resist layer to an electromagnetic wave.
12. 12 . The lithography method of claim 11 , wherein the electromagnetic wave comprises ultraviolet light.
13. 13 . The lithography method of claim 10 , wherein the resist layer further comprises a thermal radical initiator and the first process comprises heating the resist layer.
14. 14 . The lithography method of claim 13 , further comprising performing a post-exposure baking process after the exposure process, wherein the post-exposure baking process has a process temperature ranging from 120 degrees Celsius to 150 degrees Celsius, wherein the resist layer is heated to a temperature less than the process temperature of the second process.
15. 15 . The lithography method of claim 10 , wherein the resist layer comprises an exposed portion and an unexposed portion after the exposure process.
16. 16 . The lithography method of claim 15 , wherein the exposed portion is removed by the developing process.
17. 17 . A lithography method, comprising: forming a first resist layer over a substrate, wherein the first resist layer comprises a first polymer and a first number of components; forming a second resist layer over the first resist layer, wherein the second resist layer comprises a second polymer and a second number of components greater than the first number of components; performing a treatment on the second resist layer; performing an exposure process on the first and second resist layers; and performing a developing process on the first and second resist layers to form patterned first and second resist layers.
18. 18 . The lithography method of claim 17 , wherein the second resist layer further comprises a cross-linker, and the first resist layer is free of a cross-linker.
19. 19 . The lithography method of claim 17 , wherein the second resist layer further comprises a thermal radical initiator, and the first resist layer is free of a thermal radical initiator.
20. 20 . The lithography method of claim 17 , wherein the treatment increases a molecular weight of the second polymer but not a molecular weight of the first polymer.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application is a continuation application of U.S. patent application Ser. No. 17/206,112 filed Mar. 18, 2021, which is incorporated by reference in its entirety. BACKGROUND Lithography processes are extensively utilized in integrated circuit (IC) manufacturing, where various IC patterns are transferred to a workpiece to form an IC device. A lithography process typically involves forming a resist layer over the workpiece, exposing the resist layer to patterned radiation, and developing the exposed resist layer, thereby forming a patterned resist layer. The patterned resist layer is used as a masking element during subsequent IC processing, such as an etching process, where a resist pattern of the patterned resist layer is transferred to the workpiece. The quality of the resist pattern directly impacts the quality of the IC device. As IC technologies continually progress towards smaller technology nodes (for example, down to 14 nanometers, 10 nanometers, and below), defects such as bridge (connected openings) and blind (partially filled openings) can occur. For example, using a high soluble polymer as the resist layer may lead to resist layer loss at non-exposed area, which induces bridge defect. On the other hand, using a low soluble polymer as the resist layer may lead to scum formation, and a subsequent de-scum process induces bridge defect. Accordingly, an improved lithography technique is needed. BRIEF DESCRIPTION OF THE DRAWINGS Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It is noted that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion. FIG. 1 illustrates a resist material that can be used for forming a resist layer, in accordance with some embodiments. FIGS. 2A and 2B illustrate chemical structures of an acid labile group (ALG) component that can be included in a resist material, such as the resist material of FIG. 1, in accordance with some embodiments. FIGS. 3A and 3B illustrate chemical structures of a cross-linking functional group that can be included in a resist material, such as the resist material of FIG. 1, in accordance with some embodiments. FIGS. 4A-4D illustrate chemical structures of a cross-linker that can be included in a resist material, such as the resist material of FIG. 1, in accordance with some embodiments. FIGS. 5A-5D illustrate a stage of a lithography process, in accordance with some embodiments. FIGS. 6A and 6B illustrate chemical structures of a thermal radical initiator that can be included in a resist material, such as the resist material of FIG. 1, in accordance with some embodiments. FIG. 7 illustrates a stage of the lithography process, in accordance with some embodiments. FIGS. 8A-8F are fragmentary cross-sectional views of a workpiece, in portion or entirety, at various fabrication stages (such as those associated with the lithography process), in accordance with some embodiments. FIGS. 9A-9C are fragmentary cross-sectional views of a workpiece, in portion or entirety, at various fabrication stages (such as those associated with the lithography process), in accordance with alternative embodiments. DETAILED DESCRIPTION The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “over,” “on,” “top,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewis