US-12619361-B2 - Scan fragmentation in memory devices

US12619361B2US 12619361 B2US12619361 B2US 12619361B2US-12619361-B2

Abstract

A memory system includes a memory device and a processing device, operatively coupled to the memory device. The processing device performs operations comprising: identifying one or more mandatory scan wordlines of the memory device and one or more remaining wordlines of the memory device; performing a plurality of scan iterations with respect to a plurality of pages of the memory device, such that performing each scan iteration comprises: identifying, among the remaining wordlines, one or more scheduled scan wordlines of the memory device, scanning a subset of pages of the memory device that are addressable by the mandatory scan wordlines and the scheduled scan wordlines; wherein a combination of a first plurality of pages addressable by the scheduled scan wordlines selected by the plurality of scan iterations and a second plurality of pages addressable by the mandatory wordlines comprises the plurality of pages of the memory device.

Inventors

Vamsi Pavan Rayaprolu
Christopher M. Smitchger
Saeed Sharifi Tehrani

Assignees

MICRON TECHNOLOGY, INC.

Dates

Publication Date: 20260505
Application Date: 20240412

Claims (20)

1 . A system comprising: a memory device; and a processing device, operatively coupled to the memory device, to perform operations comprising: identifying one or more mandatory scan wordlines of the memory device and one or more remaining wordlines of the memory device; identifying, by applying a predefined functional transformation to identifiers of the remaining wordlines, one or more scheduled scan wordlines of the memory device; and scanning a subset of pages of the memory device that are addressable by the mandatory scan wordlines and the scheduled scan wordlines.
2 . The system of claim 1 , wherein scanning the subset of pages of the memory device further comprises: evaluating, with respect to a specified page of the subset of pages, a data state metric; responsive to determining that the data state metric fails to satisfy a quality criterion, performing a media management operation with respect to a block comprising the specified page.
3 . The system of claim 2 , wherein performing the media management operation comprises relocating, to another block, data stored by the block comprising the specified page.
4 . The system of claim 2 , wherein the data state metric reflects a bit error rate of the specified page.
5 . The system of claim 1 , wherein identifying the one or more mandatory scan wordlines further comprises: reading system metadata associated with the memory device.
6 . The system of claim 1 , wherein identifying the one or more mandatory scan wordlines further comprises: identifying, among a plurality of wordlines of the memory device, one or more wordlines that are triggering more error handling operations that the remaining wordlines of the memory device.
7 . The system of claim 1 , wherein identifying the one or more scheduled scan wordlines further comprises: incrementing, by a predefined value, each of identifiers of the scheduled scan wordlines processed by a previous scan iteration.
8 . The system of claim 1 , wherein identifying the one or more scheduled scan wordlines further comprises: randomly selecting a predefined number of wordlines among the remaining wordlines of the memory device.
9 . A method, comprising: identifying, by a processing device, one or more mandatory scan wordlines of the memory device and one or more remaining wordlines of a memory device; identifying, by applying a predefined functional transformation to identifiers of the remaining wordlines, one or more scheduled scan wordlines of the memory device; and scanning a subset of pages of the memory device that are addressable by the mandatory scan wordlines and the scheduled scan wordlines.
10 . The method of claim 9 , wherein scanning the subset of pages of the memory device further comprises: evaluating, with respect to a specified page of the subset of pages, a data state metric; responsive to determining that the data state metric fails to satisfy a quality criterion, performing a media management operation with respect to a block comprising the specified page.
11 . The method of claim 10 , wherein performing the media management operation comprises relocating, to another block, data stored by the block comprising the specified page.
12 . The method of claim 10 , wherein the data state metric reflects a bit error rate of the specified page.
13 . The method of claim 9 , wherein identifying the one or more mandatory scan wordlines further comprises: reading system metadata associated with the memory device.
14 . The method of claim 9 , wherein identifying the one or more mandatory scan wordlines further comprises: identifying, among a plurality of wordlines of the memory device, one or more wordlines that are triggering more error handling operations that the remaining wordlines of the memory device.
15 . The method of claim 9 , wherein identifying the one or more scheduled scan wordlines further comprises: incrementing, by a predefined value, each of identifiers of the scheduled scan wordlines processed by a previous scan iteration.
16 . The method of claim 9 , wherein identifying the one or more scheduled scan wordlines further comprises: randomly selecting a predefined number of wordlines among the remaining wordlines of the memory device.
17 . A non-transitory computer-readable storage medium comprising executable instructions that, when executed by a processing device, cause the processing device to perform operations comprising: identifying one or more mandatory scan wordlines of a memory device and one or more remaining wordlines of the memory device; identifying, by applying a predefined functional transformation to identifiers of the remaining wordlines, one or more scheduled scan wordlines of the memory device; and scanning a subset of pages of the memory device that are addressable by the mandatory scan wordlines and the scheduled scan wordlines.
18 . The non-transitory computer-readable storage medium of claim 17 , wherein scanning the subset of pages of the memory device further comprises: evaluating, with respect to a specified page of the subset of pages, a data state metric; responsive to determining that the data state metric fails to satisfy a quality criterion, performing a media management operation with respect to a block comprising the specified page.
19 . The non-transitory computer-readable storage medium of claim 17 , wherein identifying the one or more mandatory scan wordlines further comprises: reading system metadata associated with the memory device.
20 . The non-transitory computer-readable storage medium of claim 17 , wherein identifying the one or more mandatory scan wordlines further comprises: identifying, among a plurality of wordlines of the memory device, one or more wordlines that are triggering more error handling operations that the remaining wordlines of the memory device.

Description

REFERENCE TO RELATED APPLICATIONS This application is a continuation of U.S. patent application Ser. No. 17/824,562, filed May 25, 2022, which claims the benefit of U.S. Provisional Application No. 63/208,404, filed Jun. 8, 2021. Both above-identified applications are incorporated by reference herein. TECHNICAL FIELD Embodiments of the disclosure are generally related to memory sub-systems, and more specifically, related to scan fragmentation strategies based on memory degradation and system requirements. BACKGROUND A memory sub-system can include one or more memory devices that store data. The memory devices can be, for example, non-volatile memory devices and volatile memory devices. In general, a host system can utilize a memory sub-system to store data at the memory devices and to retrieve data from the memory devices. BRIEF DESCRIPTION OF THE DRAWINGS The disclosure will be understood more fully from the detailed description given below and from the accompanying drawings of some embodiments of the disclosure. FIG. 1 illustrates an example computing system that includes a memory sub-system, in accordance with some embodiments of the disclosure. FIG. 2 schematically illustrates an example full scan implemented by the memory sub-system controller operating in accordance with aspects of the present disclosure. FIG. 3 is a flow diagram of an example method of performing a full scan of a memory device, in accordance with some embodiments of the disclosure. FIG. 4 is a flow diagram of another example method of performing a full scan of a memory device, in accordance with some embodiments of the disclosure. FIG. 5 is a block diagram of an example computer system in which embodiments of the disclosure can operate. DETAILED DESCRIPTION Embodiments of the disclosure are directed to scan fragmentation strategies based on memory degradation and system requirements. One or more memory devices can be a part of a memory sub-system, which can be a storage device, a memory module, or a hybrid of a storage device and memory module. Examples of storage devices and memory modules are described below in conjunction with FIG. 1. In general, a host system can utilize a memory sub-system that includes one or more components, such as memory devices that store data. The host system can provide data to be stored at the memory sub-system and can request data to be retrieved from the memory sub-system. The memory sub-system can perform various data operations, e.g., host-initiated data operations. For example, the host system can initiate a data operation (e.g., write, read, erase, etc.) on a memory sub-system. The host system can send access requests (e.g., write command, read command) to the memory sub-system, such as to store data on a memory device at the memory sub-system and to read data from the memory device on the memory sub-system. The data to be read or written, as specified by a host request, hereinafter is referred to as “host data.” A host request can include logical address information (e.g., logical block address (LBA), namespace) for the host data, which is the location the host system associates with the host data. The logical address information (e.g., LBA, namespace) can be part of metadata for the host data. Metadata can also include error handling data (e.g., error correction code (ECC) codeword, parity code), data version (e.g., used to distinguish age of data written), valid bitmap (indicating which LBAs or logical transfer units contain valid data), and the like. A memory sub-system can include high density non-volatile memory devices where retention of data is desired when no power is supplied to the memory device. One example of non-volatile memory devices is a negative-and (NAND) memory device. Other examples of non-volatile memory devices are described below in conjunction with FIG. 1. A non-volatile memory device is a package of one or more dies. Each die can include two or more planes. For some types of non-volatile memory devices (e.g., NAND devices), each plane includes of a set of physical blocks. In some implementations, each block can include multiple sub-blocks. Each plane carries a matrix of memory cells formed onto a silicon wafer and joined by conductors referred to as wordlines and bitlines, such that a wordline joins multiple memory cells forming a row of the matric of memory cells, while a bitline joins multiple memory cells forming a column of the matric of memory cells. Depending on the cell type, each memory cell can store one or more bits of binary information, and has various logic states that correlate to the number of bits being stored. The logic states can be represented by binary values, such as “0” and “1”, or combinations of such values. A set of memory cells referred to as a memory page can be programmed together in a single operation, e.g., by selecting consecutive bitlines. A memory cell can be programmed (written to) by applying a certain voltage to the memory cell, which re