US-12619379-B2 - Method and system for performing dynamic host memory buffer (HMB) management in PCIe based devices

Abstract

There is provided a method and a controller for performing dynamic Host Memory Buffer (HMB) management in Peripheral Component Interconnect express (PCIe) based devices. The controller estimates a potential memory requirement for one or more memory intensive operations to be performed by the PCIe based device, transmits a first request to a host device associated with the PCIe based device, the first request indicating the potential memory requirement from Host Memory Buffer (HMB) of the host device, receives a plurality of memory allocation slots from the host device based on the first request, transmits a second request comprising HMB information related to current memory requirement based on the plurality of memory allocation slots to the host device and initializes memory of the HMB allocated to the controller based on the second request, for performing the at least one of the one or more memory intensive operations.

Inventors

• SURESH VISHNOI
• Manoj Kumar TANGELLA
• Rakesh Balakrishnan
• Pradeep Sagar RAMACHANDRA

Assignees

• SAMSUNG ELECTRONICS CO., LTD.

Dates

Publication Date

20260505

Application Date

20240118

Priority Date

20230530

Claims (20)

1. 1 . A method of performing dynamic Host Memory Buffer (HMB) management in a Peripheral Component Interconnect express (PCIe) based device including a controller, the method comprising: estimating a potential memory requirement for one or more memory intensive operations to be performed by the PCIe based device; transmitting a first request to a host device associated with the PCIe based device, the first request indicating the potential memory requirement from a Host Memory Buffer (HMB) of the host device; receiving a plurality of memory allocation slots from the host device based on the first request; transmitting a second request comprising HMB information related to a current memory requirement to dynamically use the plurality of memory allocation slots to the host device each time the controller requires memory from the HMB; and initializing a memory of the HMB allocated to the PCIe based device based on the second request, for performing the at least one of the one or more memory intensive operations, wherein the HMB information comprises: a first information indicating whether a first slot allocated by the host device, among the plurality of memory allocation slots, is enabled, and a second information indicating whether the first slot allocated by the host device, among the plurality of memory allocation slots, is in use.
2. 2 . The method as claimed in claim 1 , wherein the one or more memory intensive operations comprises at least one of prefetching, pattern-based improvement of an application, background migration, flash operations, Garbage Collection (GC) migration and host memory-based operations of a product for optimization and functionality.
3. 3 . The method as claimed in claim 1 , wherein the HMB information is stored in an array data structure.
4. 4 . The method as claimed in claim 3 , wherein the HMB information comprises at least one of, an “enabled” field corresponding to the first information, an “in-use” field corresponding to the second information, an HMB size, an HMB preferred size, an HMB maximum size, an HMB minimum size, priority to free a memory, an approximate duration to hold a memory for performing at least one of the one or more memory intensive operations and an HMB memory descriptor list.
5. 5 . The method as claimed in claim 1 , further comprises: receiving the plurality of memory allocation slots transmitted by the host device through one of a get feature command, a get log page command and a command customized as per customer requirement.
6. 6 . The method as claimed in claim 1 , further comprises: allocating the memory of the HMB to the controller based on the second request; and deallocating the memory of the HMB from the controller based on a third request, wherein the second request and the third request communicated through one of a set feature command and a command customized as per customer requirement.
7. 7 . The method as claimed in claim 1 , further comprises: transmitting, to the host device, a third request comprising the HMB information related to dynamically deallocate the memory of the HMB used to perform at least one of the one or more memory intensive operations, wherein the third request is transmitted to the host device upon voluntarily removing data from the memory of the HMB or prior to removal of the data from the memory of the HMB.
8. 8 . The method as claimed in claim 7 comprises, when the third request is transmitted prior to the removal of the data from the memory of the HMB, receiving a confirmation from the host device to remove the data from the memory of the HMB based on the third request; and removing the data from the memory of the HMB based on the confirmation from the host device.
9. 9 . The method as claimed in claim 7 , further comprising: upon completion of the removal of the data from the memory of the HMB, deallocating the memory of the HMB, by the host device, based on the HMB information related to deallocation of the memory of the HMB.
10. 10 . The method as claimed in claim 1 , wherein the method further comprises: updating, by the controller, the second information to indicate that the first slot is in use, and transmitting third information to the host device indicating that the initialization was successful.
11. 11 . An apparatus for performing dynamic Host Memory Buffer (HMB) management in a Peripheral Component Interconnect express (PCIe) based device, the apparatus comprising: a controller; and a memory, communicatively coupled to the controller, and storing instructions, which when executed by the controller cause the controller to: estimate a potential memory requirement for one or more memory intensive operations to be performed by the PCIe based device; transmit a first request to a host device associated with the PCIe based device, the first request indicating the potential memory requirement from a Host Memory Buffer (HMB) of the host device; receive a plurality of memory allocation slots from the host device based on the first request; transmit a second request comprising HMB information related to current memory requirement to dynamically use the plurality of memory allocation slots to the host device; and initialize a memory of the HMB allocated to the controller based on the second request, for performing the at least one of the one or more memory intensive operations, wherein the HMB information comprises: a first information indicating whether a first slot allocated by the host device, among the plurality of memory allocation slots, is enabled, and a second information indicating whether the first slot allocated by the host device, among the plurality of memory allocation slots, is in use.
12. 12 . The apparatus as claimed in claim 11 , wherein the one or more memory intensive operations comprises at least one of prefetching, pattern-based improvement of an application, background migration, flash operations, Garbage Collection (GC) migration and host memory-based operations of a product for optimization and functionality.
13. 13 . The apparatus as claimed in claim 11 , wherein the HMB information is stored in an array data structure.
14. 14 . The apparatus as claimed in claim 13 , wherein the HMB information comprises at least one of, an “enabled” field corresponding to the first information, an “in-use” field corresponding to the second information, an HMB size, an HMB preferred size, an HMB maximum size, an HMB minimum size, priority to free a memory, an approximate duration to hold a memory for performing at least one of the one or more memory intensive operations and an HMB memory descriptor list.
15. 15 . The apparatus as claimed in claim 11 , wherein the controller is further configured to receive the plurality of memory allocation slots transmitted by the host device through one of a get feature command, a get log page command or a command customized as per customer requirement.
16. 16 . The apparatus as claimed in claim 11 , wherein the memory of the HMB is allocated to the controller by the host device based on the second request and deallocated from the controller by the host device based on, a third request, wherein the second request and the third request communicated through one of a set feature command or a command customized as per customer requirement.
17. 17 . The apparatus as claimed in claim 11 , wherein the controller is further configured to: transmit, to the host device, a third request comprising the HMB information related to dynamically deallocate the memory of the HMB used to perform at least one of the one or more memory intensive operations, wherein the third request is transmitted to the host device upon voluntarily removing data from the memory of the HMB or prior to removal of the data from the memory of the HMB.
18. 18 . The apparatus as claimed in claim 17 comprises, when the third request is transmitted prior to the removal of the data from the memory of the HMB, the controller is configured to: receive a confirmation from the host device to remove the data from the memory of the HMB based on the third request; and remove the data from the memory of the HMB based on to the confirmation from the host device.
19. 19 . The apparatus as claimed in claim 17 , wherein upon completion of the removal of the data from the memory of the HMB, the memory of the HMB is deallocated by the host device based on the HMB information related to deallocation of the memory of the HMB.
20. 20 . The apparatus as claimed in claim 11 , wherein the controller is further configured to: update, by the controller, the second information to indicate that the first slot is in use, and transmit third information to the host device indicating that the initialization was successful.

Description

CROSS-REFERENCE TO RELATED APPLICATION This application is based on and claims priority from Indian Patent Application No. 202341037382 filed on May 30, 2023, in the Indian Intellectual Property Office, the disclosure of which is incorporated by reference herein in its entirety. BACKGROUND 1. Field The disclosure relates to Peripheral Component Interconnect express (PCIe) based devices, and in particular, to a method and system for performing dynamic Host Memory Buffer (HMB) management in the PCIe based devices. 2. Description of Related Art A Host Memory Buffer (HMB) is a memory portion present in a host device, which is used by Peripheral Component Interconnect express (PCIe) based devices. In the PCIe based devices, the controller of the PCIe based devices uses the HMB instead of an onboard limited memory to enhance performance of the PCIe based devices. However, in the related art methods using storage protocols like Non-Volatile Memory express (NVMe), the HMB allocation is static, which means that the required HMB is allocated only once during the boot time of the PCIe based device and freed by the host device once the session is completed. Further, in the related art methods, deallocation of the HMB takes place when the host device determines that the HMB should be freed or when the host device requires the allocated memory to perform operations of the host device. Therefore, when the host device sends an instruction to the PCIe based device regarding deallocation, the PCIe based device may terminate operations that are being performed using the allocated memory of the HMB and remove data from the allocated memory of the HMB. Thereafter, the host device deallocates the memory of the HMB that was initially allocated to the PCIe based device. This poses a challenge for the PCIe based device as it may have to free the memory upon receiving the instructions from the host device, leading to delays in completing operations of the PCIe based device or termination of the operations due to lack of memory. Moreover, in the related art methods, the PCIe based device does not have any means to communicate with the host device to free the allocated memory of the HMB when the PCIe based device has completed its operations and does not require the allocated memory of the HMB any longer. This leads to a scenario, in which, even though the memory is not being used by the PCIe based device, a part of the HMB memory is held up at the PCIe based device until the host device sends a deallocation request to the PCIe based device. Accordingly, in the related art systems, the HMB is not being used optimally, and the controller is unable to use the HMB for event-based throughput enhancement without affecting the currently loaded HMB data. The information disclosed in this background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art. SUMMARY According to an aspect of the disclosure, there is provided a method of performing dynamic Host Memory Buffer (HMB) management in a Peripheral Component Interconnect express (PCIe) based device including a controller, the method including: estimating a potential memory requirement for one or more memory intensive operations to be performed by the PCIe based device; transmitting a first request to a host device associated with the PCIe based device, the first request indicating the potential memory requirement from a Host Memory Buffer (HMB) of the host device; receiving a plurality of memory allocation slots from the host device based on the first request; transmitting a second request including HMB information related to a current memory requirement to dynamically use the plurality of memory allocation slots to the host device each time the controller requires memory from the HMB; and initializing a memory of the HMB allocated to the PCIe based device based on the second request, for performing the at least one of the one or more memory intensive operations. The one or more memory intensive operations may include prefetching, specific application's pattern-based improvement, background migration, flash operations, Garbage Collection (GC) migration and any product's host memory-based operations for optimization and functionality. The HMB information may be stored in an array data structure. The HMB information may include at least one of, an “enabled” field, an “in-use” field, an HMB size, an HMB preferred size, an HMB maximum size, an HMB minimum size, priority to free a memory, an approximate duration to hold a memory for performing at least one of the one or more memory intensive operations and an HMB memory descriptor list. The method may further include receiving the plurality of memory allocation slots transmitted by the host device through one of a get feature command, a get log page c