US-12619495-B2 - Thresholds for soft reads of data

US12619495B2US 12619495 B2US12619495 B2US 12619495B2US-12619495-B2

Abstract

A method for selecting Soft Bit Read (SBR) thresholds in a memory device, includes setting, by a controller, a range of SBR thresholds around a Hard Read Position (HRP) for the memory device. The controller calculates mutual information for each set of SBR thresholds within the range of SBR thresholds. The controller calculates a theoretical compression ratio for each set of SBR thresholds in the range of SBR thresholds. The controller selects SBR thresholds from the range of SBR thresholds that provide a balance of the mutual information and the theoretical compression ratio.

Inventors

Mustafa N. Kaynak
Sivagnanam Parthasarathy

Assignees

MICRON TECHNOLOGY, INC.

Dates

Publication Date: 20260505
Application Date: 20240725

Claims (14)

1 . A method for selecting Soft Bit Read (SBR) thresholds in a memory device, comprising: setting, by a controller of a memory sub-system, a range of SBR thresholds around a Hard Read Position (HRP) for the memory device by determining a lower SBR threshold positioned below the HRP by a negative voltage offset and a higher SBR threshold positioned above the HRP by a positive voltage offset at predefined voltage intervals for four reliability regions in threshold voltage distributions of memory cells; calculating, by the controller, mutual information for each set of SBR thresholds within the range of SBR thresholds by computing probabilities that bits are found in the four reliability regions using entropy calculations, wherein the mutual information quantifies how accurately data read from the memory device represents original data written to the memory device; calculating, by the controller, a theoretical compression ratio for each set of SBR thresholds in the range of SBR thresholds by determining probabilities of weak bits and strong bits based on the four reliability regions and computing entropy of a strong-weak vector to determine compressibility of soft information transferred through an interface; selecting, by the controller, SBR thresholds from the range of SBR thresholds that provide a balance of the mutual information and the theoretical compression ratio by applying a cost function that weighs the mutual information and theoretical compression ratio to evaluate threshold combinations within the range and select thresholds based on the evaluation; and employing the selected SBR thresholds for soft read operations of the memory device.
2 . The method of claim 1 , further comprising: collecting, by the controller, threshold voltage distributions of memory cells within the memory device; and determining, by the controller, the HRP for the memory device based on the collected threshold voltage distributions.
3 . The method of claim 1 , wherein the selecting further comprises: selecting one of the corresponding SBR thresholds from the range of SBR thresholds with a greatest cost as indicated by the cost function.
4 . The method of claim 3 , wherein weights of the cost function are adjusted dynamically based on performance data from the memory device.
5 . The method of claim 3 , wherein applying the cost function further comprises inputting values of a correction capability of data stored in the memory device for the corresponding SBR thresholds into the cost function.
6 . The method of claim 1 , wherein selection of the SBR thresholds is further based on operational specifications of a system incorporating the memory device.
7 . The method of claim 1 , wherein the selected SBR thresholds are employed in soft read operations of the memory device to balance error correction capabilities with data transfer efficiency.
8 . The method of claim 1 , wherein the memory device is a Not-AND (NAND) flash memory device.
9 . A system for selecting Soft Bit Read (SBR) thresholds in a memory device, comprising: a memory device; and a processing device coupled to the memory device, the processing device to perform operations comprising: setting, by a controller of a memory sub-system, a range of SBR thresholds around a Hard Read Position (HRP) for the memory device by determining a lower SBR threshold positioned below the HRP by a negative voltage offset and a higher SBR threshold positioned above the HRP by a positive voltage offset at predefined voltage intervals for four reliability regions in threshold voltage distributions of memory cells; calculating, by the controller, mutual information for each set of SBR thresholds within the range of SBR thresholds by computing probabilities that bits are found in the four reliability regions using entropy calculations, wherein the mutual information quantifies how accurately data read from the memory device represents original data written to the memory device; calculating, by the controller, a theoretical compression ratio for each set of SBR thresholds in the range of SBR thresholds by determining probabilities of weak bits and strong bits based on the four reliability regions and computing entropy of a strong-weak vector to determine compressibility of soft information transferred through an interface; selecting, by the controller, SBR thresholds from the range of SBR thresholds that provide a balance of the mutual information and the theoretical compression ratio by applying a cost function that weighs the mutual information and theoretical compression ratio to evaluate threshold combinations within the range and select thresholds based on the evaluation; and employing the selected SBR thresholds for soft read operations of the memory device.
10 . The system of claim 9 , wherein the operations further comprise: collecting threshold voltage distributions of memory cells within the memory device; and determining the HRP for the memory device based on the collected threshold voltage distributions.
11 . The system of claim 9 , wherein the selecting further comprises: selecting one of the corresponding SBR thresholds from the range of SBR thresholds with a greatest cost as indicated by the cost function.
12 . The system of claim 9 , wherein the selecting of the SBR thresholds is further based on operational specifications of a system incorporating the memory device.
13 . A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising: setting, by a controller of a memory sub-system, a range of SBR thresholds around a Hard Read Position (HRP) for a memory device by determining a lower SBR threshold positioned below the HRP by a negative voltage offset and a higher SBR threshold positioned above the HRP by a positive voltage offset at predefined voltage intervals for four reliability regions in threshold voltage distributions of memory cells; calculating, by the controller, mutual information for each set of SBR thresholds within the range of SBR thresholds by computing probabilities that bits are found in the four reliability regions using entropy calculations, wherein the mutual information quantifies how accurately data read from the memory device represents original data written to the memory device; calculating, by the controller, a theoretical compression ratio for each set of SBR thresholds in the range of SBR thresholds by determining probabilities of weak bits and strong bits based on the four reliability regions and computing entropy of a strong-weak vector to determine compressibility of soft information transferred through an interface; selecting, by the controller, SBR thresholds from the range of SBR thresholds that provide a balance of the mutual information and the theoretical compression ratio by applying a cost function that weighs the mutual information and theoretical compression ratio to evaluate threshold combinations within the range and select thresholds based on the evaluation; and employing the selected SBR thresholds for soft read operations of the memory device.
14 . The non-transitory computer-readable storage medium of claim 13 , wherein the memory device is a Not-AND (NAND) flash memory device, and the selected SBR thresholds are employed in soft read operations of the memory device to balance error correction capabilities with data transfer efficiency.

Description

TECHNICAL FIELD This disclosure relates to selecting soft bit read (SBR) thresholds for soft reads of data from a memory device. BACKGROUND A memory sub-system includes a memory device designed for data storage. These memory devices are implemented as non-volatile and volatile memory devices in various examples. In some such examples, a host system employs a memory sub-system for the purposes of storing data on the memory devices and for retrieving data from the memory devices. Not-AND (NAND) flash memory is a type of non-volatile storage technology used in electronic devices and computers for data storage. In NAND flash memory, data is stored in memory cells that can hold electrical charges, representing data bits. A threshold voltage (Vt) of a cell determines a state (0 or 1) of the memory cell, which is employed for reading and writing data accurately. Error Correction Codes (ECC), such as Low-Density Parity-Check (LDPC) codes are used to correct errors that occur during the reading and writing processes of memory cells of memory devices. Conventional ECC employs hard bit reads, where each memory cell is read at a single threshold voltage to determine a state of each memory cell. However, hard reads have a limited ability to correct errors. To improve error correction capabilities, soft information (reliability information) can be used. Soft information is obtained by performing multiple reads at different threshold voltages (soft bit reads), which aids in assigning reliability values to the bits read. This additional information allows ECC to correct more errors, approaching the theoretical limits of correction capabilities (Shannon limit). BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A illustrates a system for selecting soft bit read thresholds for decoding data from a memory sub-system. FIG. 1B illustrates a simplified block diagram of an example memory device in communication with a memory sub-system controller. FIG. 2A illustrates a graph depicting a soft read operation that plots probability as a function of voltage read from a memory cell. FIG. 2B illustrates a graph that plots a number of bits needed after compression as a function of probability of a bit being a ‘1’. FIG. 2C illustrates a first modified version of the graph illustrated in FIG. 2A. FIG. 2D illustrates a second modified version of the graph illustrated in FIG. 2A. FIG. 3 illustrates a flowchart of an example method for selecting soft bit read thresholds. FIG. 4 illustrates an example of a computer system (a machine) in which examples of the present description may operate. DETAILED DESCRIPTION This description is related to selecting Soft Bit Read (SBR) thresholds in a memory sub-system, such as a memory sub-system that implements Not-AND (NAND) flash memory. Tuning the SBR improves error correction capabilities and operational efficiency of the memory sub-system. A soft read of data includes executing multiple reads at different voltages to gather more detailed reliability information about the data stored in the memory sub-system, which information is referred to as soft information. This soft information enhances an ability of an error correction code (ECC) to correct errors, pushing the operation of the memory sub-system closer to the theoretical limits defined by the Shannon limit. The different voltages include a Hard Read Position (HRP) and, as an example, two Soft Bit Read (SBR) thresholds, which determine the relative position of soft read voltages with respect to the HRP or a threshold. SBR thresholds can be tuned to balance error correction capability and data transfer in situations where soft information is compressed. Additionally, this description provides a cost function that weighs factors such as mutual information (MI), compression ratio of soft information and correction capabilities. MI measures how much the output from the memory sub-system (after reading) reflects the input data, with a higher MI indicating less uncertainty and better prediction of original data from the read data. The cost function, which is adjustable statically or dynamically, helps determine the SBR thresholds that balance these factors according to system needs. Furthermore, the systems and methods provided in this description enables dynamic adjustments of a target compression ratio and correction capability based on performance data (e.g., real-time performance data), ensuring high rates of speed and data reliability under varying conditions. The systems and methods of this description enhances error correction and increases system efficiency by reducing the data transfer volume through effective compression of soft information. The flexibility offered by adjustment of SBR thresholds and the leveraging of the cost function provide adaptability across different operational demands and conditions. Ultimately, the operations described in this description improve system performance by balancing correction capabilities with compression ratios. M