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US-12619526-B2 - Storage device, storage system, and operating method of storage system

US12619526B2US 12619526 B2US12619526 B2US 12619526B2US-12619526-B2

Abstract

A storage system may include: a host device including a host memory and configured to: set a size of a host memory buffer (HMB) based on an HMB ID indicating the size of the HMB; and allocate a portion of the host memory as the HMB, the portion corresponding to the size of the HMB. The storage system may further include a storage device including a non-volatile memory and configured to: generate the HMB ID indicating the size of the HMB, which is based on capacity of the non-volatile memory and communication speed between the host device and the storage device; and transmit the HMB ID to the host device.

Inventors

  • Jeang-Su HWANG
  • Seokha SHIN

Assignees

  • SAMSUNG ELECTRONICS CO., LTD.

Dates

Publication Date
20260505
Application Date
20240814
Priority Date
20231012

Claims (13)

  1. 1 . An operating method of a storage system, comprising: establishing communication with a host device comprising a host memory; determining a host memory buffer (HMB) information instructing the host device to allocate a portion of the host memory as an HMB region having a size based on a communication speed between the host device and a storage device; transmitting an asynchronous event request (AER) requesting allocation of the HMB region to the host device; and accessing the HMB region allocated based on the HMB information, wherein the determining of the HMB information comprises: generating a first HMB information instructing to set the size of the HMB region as a first size corresponding to a first speed based on the communication speed being the first speed; and generating a second HMB information instructing to set the size of the HMB region as a second size corresponding to a second speed based on the communication speed being changed from the first speed to the second speed.
  2. 2 . The operating method of the storage system of claim 1 , wherein the second size is greater than the first size based on the second speed being faster than the first speed, and wherein the second size is smaller than the first size based on the second speed being slower than the first speed.
  3. 3 . A storage system, comprising: a storage device comprising a non-volatile memory and configured to: monitor a communication speed between a host device and the storage device, generate a first host memory buffer (HMB) information instructing to set a size of an HMB as a first size corresponding to a first speed, based on the communication speed being the first speed, and transmit the first HMB information to the host device, wherein the host device comprises a host memory and is configured to: set the size of the HMB based on the first HMB information, and allocate a first portion of the host memory as the HMB corresponding to the first size, wherein the storage device is further configured to: detect that the communication speed changes from the first speed to a second speed, generate a second HMB information corresponding to the second speed, and transmit the second HMB information to the host device, and wherein the host device is further configured to reallocate a second portion of the host memory as the HMB based on the second HMB information.
  4. 4 . The storage system of claim 3 , wherein the storage device is configured to: transmit an asynchronous event request (AER) instructing to change from the first HMB information to the second HMB information, to the host device.
  5. 5 . The storage system of claim 3 , wherein the second portion of the host memory is larger than the first size based on the second speed being faster than the first speed.
  6. 6 . The storage system of claim 3 , wherein the second portion of the host memory is smaller than the first size based on the second speed being slower than the first speed.
  7. 7 . The storage system of claim 3 , wherein the first HMB information and the second HMB information comprise at least one of a minimum size of the HMB, a maximum size of the HMB, and the communication speed.
  8. 8 . A storage device, comprising: a host interface connected to a host device and configured to transmit and receive a plurality of packets; a non-volatile memory; and a host memory buffer (HMB) controller configured to: monitor a communication speed between the storage device and the host device, determine a size of an HMB region allocated from the host device as a first size corresponding to a first speed based on the communication speed being the first speed and predetermined HMB size data comprising the size of the HMB region corresponding to the communication speed; buffer metadata for the non-volatile memory in the HMB region; instruct the host interface to transmit the size of the HMB region to the host device; and based on the communication speed being changed from the first speed to a second speed, determine the size of the HMB region as a second size corresponding to the second speed.
  9. 9 . The storage device of claim 8 , wherein the second size is greater than the first size based on the second speed being faster than the first speed.
  10. 10 . The storage device of claim 8 , wherein the second size is smaller than the first size based on the second speed being slower than the first speed.
  11. 11 . The storage device of claim 8 , further comprising: at least one central processing unit (CPU) configured to control the non-volatile memory in response to a request from the host device, wherein the at least one CPU is further configured to set a size of the metadata to be flushed from the HMB to the non-volatile memory based on the size of the HMB region.
  12. 12 . The storage device of claim 8 , further comprising: a flash translate layer (FTL) configured to generate mapping data between a logical address received from the host device and a physical address of the non-volatile memory, wherein the metadata comprises the mapping data.
  13. 13 . The storage device of claim 8 , wherein the storage device is configured to transmit an asynchronous event request (AER) requesting allocation of an HMB having the size of the HMB region to the host device through the host interface.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0136145 filed in the Korean Intellectual Property Office on Oct. 12, 2023, and Korean Patent Application No. 10-2024-0028143 filed in the Korean Intellectual Property Office on Feb. 27, 2024, the entire contents of which are incorporated herein by reference. BACKGROUND 1. Field This disclosure relates to a storage device, a storage system including the same, and an operating method of the storage system. 2. Description of the Related Art As various electronic devices are used by many people and large amounts of data are generated, storage devices require large amounts of resources to handle the data. For example, as the amount of data increases, the amount of metadata associated with the data may also increase. The storage device may require a sufficient amount of memory to buffer the increased amount of data and metadata. However, it can be difficult to implement a storage device with sufficient resources due to various issues such as cost, device size, design limitations, etc. Meanwhile, recently, peripheral component interconnect express (PCIe)-based non-volatile memory express (NVMe) and UFS-based unified memory extension (UME) are being actively researched and applied to storage devices. The interface provides memory sharing functions between devices. For example, a host may allocate a portion of a memory region within the host to a storage device, and the allocated memory region may be referred to as a host memory buffer (HMB). SUMMARY The present disclosure attempts to provide a storage system including an HMB with an appropriate size. According to one or more example embodiments, a storage system may include: a host device including a host memory and configured to: set a size of a host memory buffer (HMB) based on an HMB ID indicating the size of the HMB; and allocate a portion of the host memory as the HMB, the portion corresponding to the size of the HMB. The storage system may further include a storage device including a non-volatile memory and configured to: generate the HMB ID indicating the size of the HMB, which is based on capacity of the non-volatile memory and communication speed between the host device and the storage device; and transmit the HMB ID to the host device. According to one or more example embodiments, a storage device may include: a host interface connected to a host device and configured to transmit and receive a plurality of packets; a non-volatile memory; and a host memory buffer (HMB) controller configured to: monitor communication speed between the storage device and the host device, to determine a size of an HMB region allocated from the host device based on the communication speed; buffer metadata for the non-volatile memory in the HMB region; and instruct the host interface to transmit the size of the HMB region to the host device. According to one or more example embodiments, an operating method of a storage system may include: establishing communication with a host device including a host memory; determining a host memory buffer (HMB) ID instructing the host device to allocate a portion of the host memory as an HMB region having a size based on communication speed between the host device and a storage device; transmitting an asynchronous event request (AER) requesting allocation of the HMB region to the host device; and accessing the HMB region allocated based on the HMB ID. According to one or more example embodiments, a host device may include: memory storing instructions, and having a portion thereof allocated as a host memory buffer (HMB); and at least one processor operatively connected to the memory and configured to execute the instructions to: receive a HMB ID indicating a size of the HMB, from a storage device, the size of the HMB being based on capacity of the storage device and communication speed between the host device and the storage device; set the size of the HMB based on the HMB ID; and allocate the portion of the memory as the HMB, the portion corresponding to the size of the HMB. BRIEF DESCRIPTION OF THE DRAWINGS Embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings in which: FIG. 1 illustrates a storage system according to one or more embodiments; FIG. 2 illustrates data loaded into a host memory according to one or more embodiments; FIG. 3 illustrates a storage controller according to one or more embodiments; FIG. 4 illustrates an operating method of a storage system according to one or more embodiments; FIG. 5 illustrates an operating method of a storage system according to one or more embodiments; FIG. 6 illustrates step S2001 of FIG. 5. FIG. 7 illustrates the HMB region of a host device according to one or more embodiments; FIG. 8 is a graph illustrating performance and power according to HMB size and speed according to one or more