US-12620344-B2 - Display panel and display device

US12620344B2US 12620344 B2US12620344 B2US 12620344B2US-12620344-B2

Abstract

Provided are a display panel and a display device. The display panel includes first shift registers. A first shift register includes a node control module, a first control module, a first output module and a second output module. The node control module is configured to control a potential of the first node and a potential of the second node. The first control module is connected between the first node and a third node. The first output module is connected between a first power supply terminal and an output signal terminal. The second output module is connected between a second power supply terminal and the output signal terminal. In a first output stage, the first output module is turned on, the second output module is turned off and the first control module is turned off.

Inventors

Zhoulin Ke
Cheng Hu

Assignees

Xiamen Tianma Display Technology Co., Ltd.

Dates

Publication Date: 20260505
Application Date: 20240815
Priority Date: 20230828

Claims (20)

1 . A display panel, comprising: first shift registers, wherein a first shift register of the first shift registers comprises: a node control module, a first control module, a first output module, and a second output module; wherein the node control module is connected to a first signal terminal, a first clock signal terminal, a first node and a second node, and the node control module is configured to control a potential of the first node and a potential of the second node; a control terminal of the first control module is connected to a second signal terminal, and the first control module is connected between the first node and a third node; a control terminal of the first output module is connected to the third node, and the first output module is connected between a first power supply terminal and an output signal terminal; and a control terminal of the second output module is connected to the second node, and the second output module is connected between a second power supply terminal and the output signal terminal; wherein a working stage of the first shift register comprises a first output stage, wherein in the first output stage, the node control module adjusts the potential of the first node and the potential of the second node so that the first output module is turned on, the second output module is turned off and the first control module is turned off; wherein the node control module comprises a fourth transistor, wherein a gate of the fourth transistor is connected to the first clock signal terminal, and the fourth transistor is connected between the first signal terminal and the first node; and the first signal terminal provides signals alternating between a high level and a low level; wherein in the first output stage, the fourth transistor is turned on, and the first signal terminal provides a same signal as the first power supply terminal so that a potential of the third node is changed and is different from a potential of the first power supply terminal; and/or the first power supply terminal is configured to provide a constant voltage signal.
2 . The display panel according to claim 1 , wherein the first control module comprises a first transistor, wherein a gate of the first transistor is connected to the second signal terminal, and the first transistor is connected between the first node and the third node.
3 . The display panel according to claim 1 , wherein the first output module comprises a second transistor and a first capacitor, wherein a gate of the second transistor is connected to the third node, and the second transistor is connected between the first power supply terminal and the output signal terminal; and the first capacitor is coupled between the third node and the output signal terminal.
4 . The display panel according to claim 1 , wherein the second output module comprises a third transistor and a second capacitor, wherein a gate of the third transistor is connected to the second node, and the third transistor is connected between the second power supply terminal and the output signal terminal; and the second capacitor is coupled between the second node and the second power supply terminal.
5 . The display panel according to claim 1 , wherein a voltage signal provided by the second signal terminal is different from a voltage signal provided by the first power supply terminal.
6 . The display panel according to claim 5 , wherein the first power supply terminal provides a first low-level signal, the second signal terminal provides a second low-level signal, and the first low-level signal is not equal to the second low-level signal.
7 . The display panel according to claim 6 , wherein the first low-level signal is lower than the second low-level signal.
8 . The display panel according to claim 1 , wherein the first power supply terminal provides a first low-level signal; and in the first output stage, the potential of the third node is lower than the first low-level signal.
9 . The display panel according to claim 1 , wherein the working stage of the first shift register further comprises a second output stage, wherein in the second output stage, the node control module adjusts the potential of the first node and the potential of the second node so that the first output module is turned off and the second output module is turned on.
10 . The display panel according to claim 1 , wherein the first power supply terminal provides a low-level signal, and the second power supply terminal provides a high-level signal.
11 . A display device, comprising a display panel, wherein the display panel comprises: first shift registers, wherein a first shift register of the first shift registers comprises: a node control module, a first control module, a first output module, and a second output module, wherein the node control module is connected to a first signal terminal, a first clock signal terminal, a first node and a second node, and the node control module is configured to control a potential of the first node and a potential of the second node; a control terminal of the first control module is connected to a second signal terminal, and the first control module is connected between the first node and a third node; a control terminal of the first output module is connected to the third node, and the first output module is connected between a first power supply terminal and an output signal terminal; and a control terminal of the second output module is connected to the second node, and the second output module is connected between a second power supply terminal and the output signal terminal; wherein a working stage of the first shift register comprises a first output stage, wherein in the first output stage, the node control module adjusts the potential of the first node and the potential of the second node so that the first output module is turned on, the second output module is turned off and the first control module is turned off; wherein the node control module comprises a fourth transistor, wherein a gate of the fourth transistor is connected to the first clock signal terminal, and the fourth transistor is connected between the first signal terminal and the first node; and the first signal terminal provides signals alternating between a high level and a low level; wherein in the first output stage, the fourth transistor is turned on, and the first signal terminal provides a same signal as the first power supply terminal so that a potential of the third node is changed and is different from a potential of the first power supply terminal; and/or the first power supply terminal is configured to provide a constant voltage signal.
12 . A display panel, comprising: first shift registers, a display region and a non-display region, wherein a first shift register of the first shift registers comprises: a node control module, a first control module, a first output module, and a second output module; wherein the node control module is connected to a first signal terminal, a first clock signal terminal, a first node and a second node, and the node control module is configured to control a potential of the first node and a potential of the second node; a control terminal of the first control module is connected to a second signal terminal, and the first control module is connected between the first node and a third node; a control terminal of the first output module is connected to the third node, and the first output module is connected between a first power supply terminal and an output signal terminal; and a control terminal of the second output module is connected to the second node, and the second output module is connected between a second power supply terminal and the output signal terminal; wherein a working stage of the first shift register comprises a first output stage, wherein in the first output stage, the node control module adjusts the potential of the first node and the potential of the second node so that the first output module is turned on, the second output module is turned off and the first control module is turned off; wherein the display region comprises pixel circuits; and the non-display region comprises a first driver circuit, the first driver circuit comprises a plurality of cascaded stages of first shift registers, and an output signal terminal of one stage first shift register in the first driver circuit provides a first drive signal for at least one row of pixel circuits in the display region; wherein the non-display region further comprises a second driver circuit, the second driver circuit comprises a plurality of cascaded stages of first shift registers, and an output signal terminal of one stage first shift register in the second driver circuit provides a second drive signal for at least one row of pixel circuits in the display region; wherein the non-display region further comprises a display chip, wherein the display chip is configured to provide a voltage signal for a second signal terminal of a first shift register in the first driver circuit, and/or for a second signal terminal of a first shift register in the second driver circuit; and wherein the display chip provides different voltage signals for second signal terminals of at least two first shift registers in the first driver circuit; and/or the display chip provides different voltage signals for second signal terminals of at least two first shift registers in the second driver circuit.
13 . The display panel according to claim 12 , wherein the first drive signal is different from the second drive signal; and a voltage signal provided by the display chip for the second signal terminal in the first driver circuit is different from a voltage signal provided by the display chip for the second signal terminal in the second driver circuit.
14 . The display panel according to claim 12 , wherein the display region comprises a first region and a second region; the first driver circuit is configured to provide the first drive signal for each row of pixel circuits in the first region of the display region; and the second driver circuit is configured to provide the second drive signal for each row of pixel circuits in the second region of the display region.
15 . The display panel according to claim 14 , wherein the first drive signal and the second drive signal are each a dimming control signal; and brightness of the first region is different from brightness of the second region, and the display chip is configured to adjust a voltage signal of the second signal terminal in the first driver circuit according to the brightness of the first region and adjust a voltage signal of the second signal terminal in the second driver circuit according to the brightness of the second region.
16 . The display panel according to claim 12 , comprising S frames, wherein at least two frames of the S frames have different durations, and S>1; and for two of the at least two frames, the display chip provides different voltage signals for the second signal terminal of a same first shift register.
17 . The display panel according to claim 12 , wherein the first control module comprises a first transistor, wherein a gate of the first transistor is connected to the second signal terminal, and the first transistor is connected between the first node and the third node.
18 . The display panel according to claim 12 , wherein the first output module comprises a second transistor and a first capacitor, wherein a gate of the second transistor is connected to the third node, and the second transistor is connected between the first power supply terminal and the output signal terminal; and the first capacitor is coupled between the third node and the output signal terminal.
19 . The display panel according to claim 12 , wherein the second output module comprises a third transistor and a second capacitor, wherein a gate of the third transistor is connected to the second node, and the third transistor is connected between the second power supply terminal and the output signal terminal; and the second capacitor is coupled between the second node and the second power supply terminal.
20 . The display panel according to claim 12 , wherein a voltage signal provided by the second signal terminal is different from a voltage signal provided by the first power supply terminal.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to Chinese patent application No. 202311092570.3 filed with the China National Intellectual Property Administration (CNIPA) on Aug. 28, 2023, the disclosure of which is incorporated herein by reference in its entirety. TECHNICAL FIELD The present disclosure relates to the field of display technology and, in particular, a display panel and a display device. BACKGROUND In a display device, a shift register is generally used for driving pixel circuits in the display region. With the rapid development of display technology, users have increasingly high requirements for the display effect of a display panel, followed by higher requirements for the driving and control capability of the shift register. However, the output signal of the existing shift register is unstable, which affects the display effect of the display device. SUMMARY The present disclosure provides a display panel and a display device to solve the problem of unstable output of the existing shift register. According to one aspect of the present disclosure, a display panel is provided. The display panel includes first shift registers. A first shift register comprises a node control module, a first control module, a first output module and a second output module. The node control module is connected to a first signal terminal, a first clock signal terminal, a first node and a second node and is configured to control a potential of the first node and a potential of the second node. A control terminal of the first control module is connected to a second signal terminal, and the first control module is connected between the first node and a third node. A control terminal of the first output module is connected to the third node, and the first output module is connected between a first power supply terminal and an output signal terminal. A control terminal of the second output module is connected to the second node, and the second output module is connected between a second power supply terminal and the output signal terminal. A working stage of the first shift register includes a first output stage. In the first output stage, the node control module adjusts the potential of the first node and the potential of the second node so that the first output module is turned on, the second output module is turned off and the first control module is turned off. According to another aspect of the present disclosure, a display device is provided. The display device includes the display panel described above. It is to be understood that the content described in this section is neither intended to identify key or critical features of the embodiments of the present disclosure nor intended to limit the scope of the present disclosure. Other features of the present disclosure become easily understood through the description hereinafter. BRIEF DESCRIPTION OF DRAWINGS To illustrate technical solutions in embodiments of the present disclosure more clearly, drawings used in the description of the embodiments are briefly described below. Apparently, the drawings described below only illustrate part of the embodiments of the present disclosure, and those of ordinary skill in the art may obtain other drawings based on the drawings on the premise that no creative work is done. FIG. 1 is a diagram of a first shift register according to an embodiment of the present disclosure; FIG. 2 is a diagram of a display panel according to an embodiment of the present disclosure; FIG. 3 is a diagram of another first shift register according to an embodiment of the present disclosure; FIG. 4 is a timing diagram of the first shift register shown in FIG. 3; FIG. 5 is a diagram of another display panel according to an embodiment of the present disclosure; FIG. 6 is a diagram of a pixel circuit according to an embodiment of the present disclosure; FIG. 7 is a diagram of another display panel according to an embodiment of the present disclosure; and FIG. 8 is a diagram of a display device according to an embodiment of the present disclosure. DETAILED DESCRIPTION To make technical solutions of the present disclosure be better understood by those skilled in the art, the technical solutions in embodiments of the present disclosure are described below clearly and completely in conjunction with drawings in the embodiments of the present disclosure. Apparently, the embodiments described below are part, not all, of the embodiments of the present disclosure. Based on the embodiments of the present disclosure, all other embodiments obtained by those of ordinary skill in the art on the premise that no creative work is done are within the scope of the present disclosure. It is to be noted that terms “first”, “second” and the like in the description, claims and drawings of the present disclosure are used for distinguishing between similar objects and are not necessarily used for describing a particular order or sequence. It is to be und