US-12620345-B2 - Display apparatus

US12620345B2US 12620345 B2US12620345 B2US 12620345B2US-12620345-B2

Abstract

A display apparatus is disclosed. An aspect of the present disclosure is directed to providing a display apparatus capable of supplying an auxiliary voltage to a floating node between first and second transistors configuring a pull-up transistor of a gate driver. The display apparatus may include a plurality of pixels connected to a gate line, and a stage configured to output a gate signal to the gate line, wherein the stage includes a pull-up transistor provided between a clock line configured to receive a gate clock and the gate line, the pull-up transistor includes a first transistor and a second transistor connected to each other, and an auxiliary capacitor is connected to a floating node between the first transistor and the second transistor.

Inventors

Kunyoung LEE

Assignees

LG DISPLAY CO., LTD.

Dates

Publication Date: 20260505
Application Date: 20240917
Priority Date: 20231228

Claims (10)

1 . A display apparatus, comprising: a plurality of pixels connected to a gate line; and a stage configured to output a gate signal to the gate line, wherein the stage includes a pull-up transistor provided between a clock line configured to receive a gate clock and the gate line, wherein the pull-up transistor includes a first transistor and a second transistor connected to each other, wherein an auxiliary capacitor is connected to a floating node between the first transistor and the second transistor, wherein a first terminal of the first transistor is connected to the clock line, a second terminal of the first transistor is connected to the floating node, a first terminal of the second transistor is connected to the floating node, a second terminal of the second transistor is connected to the gate line, and a gate of the first transistor is connected to a gate of the second transistor, wherein the second terminal of the first transistor and the first terminal of the second transistor are connected to a first terminal of the auxiliary capacitor, and wherein the first terminal of the auxiliary capacitor is connected to the floating node, and a second terminal of the auxiliary capacitor is connected to an auxiliary line to which an auxiliary voltage is supplied.
2 . The display apparatus of claim 1 , wherein a gate of the first transistor and a gate of the second transistor are commonly connected to a Q node.
3 . The display apparatus of claim 1 , wherein each of the first and second transistors is formed of a Low Temperature Polycrystalline Silicon (LTPS).
4 . The display apparatus of claim 1 , wherein the auxiliary voltage is a direct current (DC) voltage.
5 . The display apparatus of claim 1 , wherein the auxiliary voltage is the same as a common voltage commonly supplied to the pixels.
6 . The display apparatus of claim 1 , wherein the auxiliary voltage is the same as a voltage supplied to a common electrode provided in the pixels or the same as a voltage supplied to a cathode provided in the pixels.
7 . The display apparatus of claim 2 , wherein a width of a pull-up pulse having a high level in a Q node voltage supplied to the Q node is greater than a width of the gate clock.
8 . The display apparatus of claim 2 , wherein a width of a pull-up pulse supplied to the Q node is three times a width of the gate clock.
9 . The display apparatus of claim 2 , wherein a low level of a Q node voltage supplied to the Q node is the same as a low level of the gate clock.
10 . The display apparatus of claim 1 , wherein the auxiliary voltage is the same as a low level of the gate clock.

Description

CROSS-REFERENCE TO RELATED APPLICATION This application claims the benefit of Korean Patent Application No. 10-2023-0194613, filed on Dec. 28, 2023, which is hereby incorporated by reference as if fully set forth herein. BACKGROUND Field The present disclosure relates to a display apparatus. Discussion of the Related Art Light emitting display apparatuses are mounted on or provided in electronic products such as televisions, monitors, notebook computers, smart phones, tablet computers, electronic pads, wearable devices, watch phones, portable information devices, navigation devices, or vehicle control display apparatus, etc., to display images. A display apparatus may be a liquid crystal display apparatus or a light emitting display apparatus, and a display apparatus includes a display panel on which an image is output. A gate driver provided in a display panel includes a pull-up transistor connected to a gate line. If a pull-up transistor is continuously stressed, a gate pulse output to a gate line may not be normally output, and accordingly, a horizontal band-shaped defect can occur in a display panel. SUMMARY Accordingly, the present disclosure is directed to providing a light emitting display apparatus that substantially obviates one or more problems due to limitations and disadvantages of the related art. An aspect of the present disclosure is directed to providing a display apparatus capable of supplying an auxiliary voltage to a floating node between first and second transistors configuring a pull-up transistor of a gate driver. Additional advantages and features of the disclosure will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or can be learned from practice of the disclosure. The objectives and other advantages of the disclosure can be realized and attained by the structure particularly pointed out in the written description as well as the appended drawings. To achieve these and other advantages and in accordance with the purpose of the disclosure, as embodied and broadly described herein, there is provided a display apparatus comprising a plurality of pixels connected to a gate line, and a stage configured to output a gate signal to the gate line, wherein the stage includes a pull-up transistor provided between a clock line configured to receive a gate clock and the gate line, the pull-up transistor includes a first transistor and a second transistor connected to each other, and an auxiliary capacitor is connected to a floating node between the first transistor and the second transistor. It is to be understood that both the foregoing general description and the following detailed description of the present disclosure are by way of example and are intended to provide further explanation of the disclosure as claimed. BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this application, illustrate embodiments of the disclosure and together with the description serve to explain the principles of the disclosure. In the drawings: FIG. 1 is an example diagram illustrating a configuration of a display apparatus according to an embodiment of the present disclosure; FIGS. 2A and 2B are example diagrams illustrating a structure of a pixel applied to a display apparatus according to an embodiment of the present disclosure; FIG. 3 is an example diagram illustrating a structure of a control driver applied to a display apparatus according to an embodiment of the present disclosure; FIG. 4 is an example diagram illustrating a structure of a gate driver applied to a display apparatus according to an embodiment of the present disclosure; FIG. 5 is an example diagram illustrating a structure of a data driver applied to a display apparatus according to an embodiment of the present disclosure; FIG. 6 is an example diagram schematically illustrating a configuration of a stage illustrated in FIG. 4; FIG. 7 is an example diagram illustrating a structure of a pull-up transistor illustrated in FIG. 6; FIG. 8 is an example diagram for explaining a driving principle of a display apparatus according to an embodiment of the present disclosure; FIG. 9 is an example diagram illustrating signals applied to a display apparatus according to an embodiment of the present disclosure; FIG. 10 is an example diagram illustrating a floating node voltage and a Q node voltage of a display apparatus according to an embodiment of the present disclosure; and FIG. 11 is an example diagram illustrating a cross-sectional surface of a display panel applied to a display apparatus according to an embodiment of the present disclosure. DETAILED DESCRIPTION Reference will now be made in detail to various embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. W