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US-12620349-B2 - Display device and driving method thereof

US12620349B2US 12620349 B2US12620349 B2US 12620349B2US-12620349-B2

Abstract

A display device includes: a memory; a pixel unit including first pixels disposed with a first density in a first area and second pixels disposed with a second density smaller than the first density in a second area in contact with the first area; and a degradation compensator which updates degradation information stored in the memory, based on input grayscales for the first and second pixels, and changes the input grayscales to output grayscales, based on the degradation information. The degradation compensator stores the degradation information in the memory in a unit of block for the pixel unit. The memory stores only first degradation information for each of first blocks including only the first pixels, stores only second degradation information for each of second blocks including only the second pixels, and stores the first and second degradation information for each of third blocks including both the first and second pixels.

Inventors

  • Seok Ha HONG
  • Hyung Jin Kim
  • Kyung Su Lee

Assignees

  • SAMSUNG DISPLAY CO., LTD.

Dates

Publication Date
20260505
Application Date
20241118
Priority Date
20221102

Claims (20)

  1. 1 . An integrated chip communicating with a memory and a pixel unit including first pixels disposed with a first density in a first area and second pixels disposed with a second density less than the first density in a second area in contact with the first area, the integrated chip comprising: a degradation compensator which updates degradation information stored in the memory, based on input grayscales for the first pixels and the second pixels, and changes the input grayscales to output grayscales, based on the degradation information, wherein the degradation compensator stores the degradation information in the memory in a unit of block for the pixel unit, and wherein the memory stores only first degradation information for each of first blocks including only the first pixels, stores only second degradation information for each of second blocks including only the second pixels, and stores both the first degradation information and the second degradation information for each of third blocks including both the first pixels and the second pixels.
  2. 2 . The integrated chip of claim 1 , wherein the first degradation information is information obtained under a condition that pixels constituting a corresponding block are all the first pixels, and the second degradation information is information obtained under a condition that pixels constituting a corresponding block are all the second pixels.
  3. 3 . The integrated chip of claim 2 , wherein a size of a storage space of the degradation information allocated to the memory for each of the third blocks is greater than a size of a storage space of the degradation information allocated to the memory for each of the first blocks or each of the second blocks.
  4. 4 . The integrated chip of claim 3 , wherein a size of a storage space of the first degradation information allocated to the memory and a size of a storage space of the second degradation information allocated to the memory are the same as each other.
  5. 5 . The integrated chip of claim 4 , wherein the size of the storage space of the degradation information allocated to the memory for each of the third blocks is two times the size of the storage space of the degradation information allocated to the memory for each of the first blocks or each of the second blocks.
  6. 6 . The integrated chip of claim 1 , wherein the degradation compensator includes a block determiner which determines a corresponding block of the input grayscales, among the first blocks, the second blocks, and the third blocks.
  7. 7 . The integrated chip of claim 6 , wherein the degradation compensator further includes a first degradation information generator which updates the first degradation information of the corresponding block, based on the input grayscales determined to correspond to the first blocks or the third blocks.
  8. 8 . The integrated chip of claim 7 , wherein the degradation compensator further includes a second degradation information generator which updates the second degradation information of the corresponding block, based on the input grayscales determined to correspond to the second blocks or the third blocks.
  9. 9 . The integrated chip of claim 8 , wherein the degradation compensator further includes a pixel determiner which determines corresponding pixels of the input grayscales, among the first pixels and the second pixels.
  10. 10 . The integrated chip of claim 9 , wherein the degradation compensator further includes a grayscale changer which changes the input grayscales to the output grayscales, based on the first degradation information, when the input grayscales correspond to the first pixels, and changes the input grayscales to the output grayscales, based on the second degradation information, when the input grayscales correspond to the second pixels.
  11. 11 . An electronic device comprising: a processor providing input grayscales with respect to an image frame; and a display device receiving the input grayscales, wherein the display device comprising: a memory; a pixel unit including first pixels disposed with a first density in a first area, the pixel unit including second pixels disposed with a second density less than the first density in a second area in contact with the first area; and a degradation compensator which updates degradation information stored in the memory, based on the input grayscales for the first pixels and the second pixels, and changes the input grayscales to output grayscales, based on the degradation information, wherein the degradation compensator stores the degradation information in the memory in a unit of block for the pixel unit, and wherein the memory stores only first degradation information for each of first blocks including only the first pixels, stores only second degradation information for each of second blocks including only the second pixels, and stores both the first degradation information and the second degradation information for each of third blocks including both the first pixels and the second pixels.
  12. 12 . The electronic device of claim 11 , wherein the first degradation information is information obtained under a condition that pixels constituting a corresponding block are all the first pixels, and the second degradation information is information obtained under a condition that pixels constituting a corresponding block are all the second pixels.
  13. 13 . The electronic device of claim 12 , wherein a size of a storage space of the degradation information allocated to the memory for each of the third blocks is greater than a size of a storage space of the degradation information allocated to the memory for each of the first blocks or each of the second blocks.
  14. 14 . The electronic device of claim 13 , wherein a size of a storage space of the first degradation information allocated to the memory and a size of a storage space of the second degradation information allocated to the memory are the same as each other.
  15. 15 . The electronic device of claim 14 , wherein the size of the storage space of the degradation information allocated to the memory for each of the third blocks is two times the size of the storage space of the degradation information allocated to the memory for each of the first blocks or each of the second blocks.
  16. 16 . The electronic device of claim 11 , wherein the degradation compensator includes a block determiner which determines a corresponding block of the input grayscales, among the first blocks, the second blocks, and the third blocks.
  17. 17 . The electronic device of claim 16 , wherein the degradation compensator further includes a first degradation information generator which updates the first degradation information of the corresponding block, based on the input grayscales determined to correspond to the first blocks or the third blocks.
  18. 18 . The electronic device of claim 17 , wherein the degradation compensator further includes a second degradation information generator which updates the second degradation information of the corresponding block, based on the input grayscales determined to correspond to the second blocks or the third blocks.
  19. 19 . The electronic device of claim 18 , wherein the degradation compensator further includes a pixel determiner which determines corresponding pixels of the input grayscales, among the first pixels and the second pixels.
  20. 20 . The electronic device of claim 19 , wherein the degradation compensator further includes a grayscale changer which changes the input grayscales to the output grayscales, based on the first degradation information, when the input grayscales correspond to the first pixels, and changes the input grayscales to the output grayscales, based on the second degradation information, when the input grayscales correspond to the second pixels.

Description

This application is a continuation of U.S. patent application Ser. No. 18/242,091, filed on Sep. 5, 2023, which claims priority to Korean patent application No. 10-2022-0144561, filed on Nov. 2, 2022, and all the benefits accruing therefrom under 35 U.S.C. § 119, the content of which in its entirety is herein incorporated by reference. BACKGROUND 1. Field The disclosure generally relates to a display device and a driving method thereof. 2. Description of the Related Art With the development of information technologies, the importance of a display device which is a connection medium between a user and information increases. Accordingly, display devices such as a liquid crystal display device and an organic light emitting display device are increasingly used. In order to implement a large-scale display screen, a design in which the existing camera hole is removed and a camera is disposed under a pixel unit has been spotlighted. Pixels overlapping the camera and pixels not overlapping the camera may be configured differently from each other in terms of arrangements, areas, densities, element characteristics, circuits, and the like. SUMMARY In a display device where pixels overlapping a camera and pixels not overlapping a camera are configured differently from each other, there is an issue that a boundary between different kinds of pixels is viewed in image display. In particular, such an issue may become more serious as the pixels are degraded. Embodiments provide a display device and a driving method thereof, in which although different kinds of pixels are degraded, the degradation of the pixels can be compensated with a minimum memory capacity. In accordance with an embodiment of the disclosure, there is provided a display device including: a memory; a pixel unit including first pixels disposed with a first density in a first area, the pixel unit including second pixels disposed with a second density less than the first density in a second area in contact with the first area; and a degradation compensator which updates degradation information stored in the memory, based on input grayscales for the first pixels and the second pixels, and changes the input grayscales to output grayscales, based on the degradation information, where the degradation compensator stores the degradation information in the memory in a unit of block for the pixel unit, and the memory stores only first degradation information for each of first blocks including only the first pixels, stores only second degradation information for each of second blocks including only the second pixels, and stores both the first degradation information and the second degradation information for each of third blocks including both the first pixels and the second pixels. In an embodiment, the first degradation information may be information obtained under a condition that pixels constituting a corresponding block are all the first pixels, and the second degradation information may be information obtained under a condition that pixels constituting a corresponding block are all the second pixels. In an embodiment, a size of a storage space of the degradation information allocated to the memory with respect to each of the third blocks may be greater than a size of a storage space of the degradation information allocated to the memory with respect to each of the first blocks or each of the second blocks. In an embodiment, a size of a storage space of the first degradation information allocated to the memory and a size of a storage space of the second degradation information allocated to the memory may be the same as each other. In an embodiment, the size of the storage space of the degradation information allocated to the memory for each of the third blocks may be two times the size of the storage space of the degradation information allocated to the memory for each of the first blocks or each of the second blocks. In an embodiment, the degradation compensator may include a block determiner which determines a corresponding block of the input grayscales, among the first blocks, the second blocks, and the third blocks. In an embodiment, the degradation compensator may further include a first degradation information generator which updates the first degradation information of the corresponding block, based on the input grayscales determined to correspond to the first blocks or the third blocks. In an embodiment, the degradation compensator may further include a second degradation information generator which updates the second degradation information of the corresponding block, based on the input grayscales determined to correspond to the second blocks or the third blocks. In an embodiment, the degradation compensator may further include a pixel determiner which determines corresponding pixels of the input grayscales, among the first pixels and the second pixels. In an embodiment, the degradation compensator may further include a grayscale changer which changes th