US-12620359-B2 - Display device including one or more blocks in non-display area

US12620359B2US 12620359 B2US12620359 B2US 12620359B2US-12620359-B2

Abstract

A display device in one example includes a substrate including a display area and a non-display area disposed at at least one side of the display area, a clock signal line disposed in the non-display area, a spare area disposed between the clock signal line and the display area, and a block disposed in the spare area. The display area includes a plurality of pixels, and each of the plurality of pixels includes at least one switching transistor and at least one driving transistor. The block can include an opaque metal layer and an area corresponding to the spare area, which is disposed in the spare area.

Inventors

Jeong-Rim SEO
Soo-Hong Choi
Hong-jae Shin

Assignees

LG DISPLAY CO., LTD.

Dates

Publication Date: 20260505
Application Date: 20240227
Priority Date: 20230228

Claims (20)

1 . A display device, comprising: a substrate including a display area and a non-display area disposed at at least one side of the display area; a clock signal line disposed in the non-display area; an encapsulation layer on the cathode; a gate driving panel circuit disposed in the non-display area; a gate power voltage line disposed in the non-display area; a spare area disposed between the clock signal line and the display area; and one or more blocks disposed in the spare area, wherein the display area includes a plurality of pixels, and each of the plurality of pixels includes an anode, a light emitting layer on the anode and a cathode on the light emitting layer, wherein the light emitting layer and the cathode extend into the non-display area, wherein the cathode overlaps the one or more blocks and the gate driving panel circuit, and wherein each of the clock signal line and the gate power voltage line includes a plurality of lines.
2 . The display device according to claim 1 , wherein each of the one or more blocks includes an opaque metal layer.
3 . The display device according to claim 1 , wherein a single block having an area corresponding to the spare area is disposed in the spare area.
4 . The display device according to claim 1 , wherein a plurality of the blocks are arranged in the spare area.
5 . The display device according to claim 1 , wherein the spare area is presented in four or more areas in the non-display area.
6 . The display device according to claim 1 , wherein each of the plurality of pixels further includes at least one switching transistor and at least one driving transistor.
7 . The display device according to claim 6 , wherein the anode is connected to the corresponding driving transistor.
8 . The display device according to claim 6 , wherein each driving transistor includes: a light shielding layer on the substrate; a buffer layer on the light shielding layer; a semiconductor layer on the buffer layer; a gate electrode on the semiconductor layer; and a source electrode and a drain electrode each connected to the semiconductor layer.
9 . The display device according to claim 8 , further comprising: an overcoat layer on the gate electrode, the source electrode and the drain electrode; and a bank on the overcoat layer.
10 . The display device according to claim 8 , wherein the light shielding layer is disposed at a same layer as the one or more blocks, and includes a same material as the one or more blocks.
11 . The display device according to claim 1 , wherein the gate power voltage line includes a gate high potential voltage line and a gate low potential voltage line.
12 . The display device according to claim 11 , wherein the clock signal line, the gate high potential voltage line and the gate low potential voltage line are disposed at a same layer.
13 . The display device according to claim 11 , wherein the light emitting layer overlaps the gate low potential voltage line and a part of the one or more blocks.
14 . The display device according to claim 1 , wherein a plurality of transistors are disposed in the gate driving panel circuit, each of the plurality of transistors includes a semiconductor layer, a source electrode and a drain electrode, and at least one of the plurality of transistors disposed in the gate driving panel circuit is electrically connected to the clock signal line.
15 . The display device according to claim 1 , wherein the encapsulation layer overlaps the clock signal line, the gate driving panel circuit and the gate power voltage line.
16 . The display device according to claim 15 , wherein the spare area is adjacent to at least one of a starting portion of the gate driving panel circuit and an ending portion of the gate driving panel circuit.
17 . The display device according to claim 16 , wherein at least one of the starting portion and the ending portion of the gate driving panel circuit includes a dummy gate driving panel circuit.
18 . The display device according to claim 17 , wherein the dummy gate driving panel circuit includes a dummy logic unit and a first dummy buffer unit, and wherein a size of the first dummy buffer unit is smaller than a size of the dummy logic unit.
19 . The display device according to claim 1 , wherein each of the one or more blocks includes at least one of titanium (Ti), molybdenum (Mo), copper (Cu), aluminum (Al), silver (Ag), chromium (Cr), gold (Au), neodymium (Nd), nickel (Ni) or their alloys.
20 . The display device according to claim 1 , wherein the light emitting layer overlaps at least a part of the one or more blocks.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS The present application claims priority to Korean Patent Application No. 10-2023-0026633, filed in Republic of Korea on Feb. 28, 2023, the entire contents of which are hereby expressly incorporated by reference into the present application. BACKGROUND Technical Field The present disclosure relates to a display device, and more particularly, for example, without limitation, to an arrangement of a gate driving panel circuit, peripheral wirings and a spare region. Discussion of the Related Art An organic light emitting display device is an emissive type device that does not include a backlight unit used in a non-emissive type device such as a liquid crystal display (LCD) device. In addition, the organic light emitting display device has advantages in low power consumption, color-productivity, a response time, a viewing angle, a contrast ratio so that it is developed as a next-generation display. A display device can include a display panel, where a plurality of date lines and a plurality of gate lines are disposed, a data driving circuit outputting a data signal to the plurality of data lines and a gate driving panel circuit outputting a gate signal to the plurality of gate lines. The description provided in the description of the related art section should not be assumed to be prior art merely because it is mentioned in or associated with the description of the related art section. The description of the related art section can include information that describes one or more aspects of the subject technology, and the description in this section does not limit the invention. SUMMARY OF THE DISCLOSURE The inventors have recognized the limitations of display device in aspects of size and performance. Accordingly, the present disclosure is directed to a display device that substantially obviates one or more of the problems due to limitations and disadvantages of the related art. An object of the present disclosure is to provide a display device being capable of preventing a light leakage from a spare region in a non-display area. An object of the present disclosure is to provide a display device having a narrow bezel area. Additional features and advantages of the disclosure will be set forth in the description which follows, and in part will be apparent from the description, or can be learned by practice of the disclosure. These and other advantages of the disclosure will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings. To achieve these and other advantages and in accordance with the purpose of the present disclosure, as embodied and broadly described herein, a display device includes a substrate including a display area and a non-display area disposed at at least one side of the display area; a clock signal line disposed in the non-display area; a spare area disposed between the clock signal line and the display area; and a block disposed in the spare area. Other detailed matters of the example embodiments are included in the detailed description and the drawings. It is to be understood that both the foregoing general description and the following detailed description are explanatory and are intended to provide further explanation of the disclosure as claimed. BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the description serve to explain the principles of the disclosure. In the drawings: FIG. 1 is a block diagram showing a display device according to an example embodiment of the present disclosure; FIG. 2 is a circuit diagram showing a subpixel of a display device according to an example embodiment of the present disclosure; FIG. 3 is a schematic view illustrating a display device according to an example embodiment of the present disclosure; FIG. 4 is an enlarged plan view of a portion in FIG. 3; FIG. 5 is a schematic circuit diagram of a circuit included in a gate driving panel circuit (GIPC) in a display device according to an example embodiment of the present disclosure; FIG. 6 is an exemplary circuit diagram of a gate high potential compensation circuit in a display device according to an example embodiment of the present disclosure; FIG. 7 is an enlarged plan view of another portion in FIG. 3; FIG. 8 is a cross-sectional view taken along line 8-8′ in FIG. 4; and FIG. 9 is a cross-sectional view taken along line 9-9′ in FIG. 7. Throughout the drawings and the detailed description, unless otherwise described, the same drawing reference numerals should be understood to refer to the same elements, features, and structures. The relative size and depiction of these elements can be exaggerated for clarity, illustration, and convenience. DETAILED DESCRIPTION OF THE EMBO