US-12620516-B2 - Multilayer electronic component

US12620516B2US 12620516 B2US12620516 B2US 12620516B2US-12620516-B2

Abstract

A multilayer electronic component includes a multilayer structure that includes dielectric layers stacked in a stack direction and has first and second surfaces provided on respective sides in the stack direction, a first side-surface electrode provided on a side surface of the multilayer structure, an inductor provided in the multilayer structure, a capacitor provided between the inductor and the first surface, a via wiring line penetrating dielectric layers from a first dielectric layer, which is in contact with the inductor, to a second dielectric layer, which is located closer to the first surface than at least a part of the capacitor, and electrically connecting a first end of the inductor and the first side-surface electrode, and a second side-surface electrode electrically connected to the first side-surface electrode through the inductor and the via wiring line and provided on the side surface or another side surface of the multilayer structure.

Inventors

Hirotaka Takeuchi

Assignees

TAIYO YUDEN CO., LTD.

Dates

Publication Date: 20260505
Application Date: 20220831
Priority Date: 20210928

Claims (10)

1 . A multilayer electronic component comprising: a multilayer structure in which dielectric layers are stacked in a stack direction, the multilayer structure having a first surface and a second surface provided on respective sides in the stack direction; a first side-surface electrode provided on a side surface of the multilayer structure; an inductor provided in the multilayer structure; a plurality of capacitors provided between the inductor and the first surface; a via wiring line that penetrates through dielectric layers from a first dielectric layer to a second dielectric layer, and electrically connects a first end of the inductor and the first side surface electrode, the first dielectric layer being in contact with the inductor, the second dielectric layer being located closer to the first surface than all of the plurality of capacitors; a second side-surface electrode that is electrically connected to the first side-surface electrode through the inductor and the via wiring line and is provided on the side surface or another side surface of the multilayer structure, and a conductor pattern provided between adjacent dielectric layers between the all of the plurality of capacitors and the first surface, the conductor pattern electrically connecting the via wiring line and the first side-surface electrode.
2 . The multilayer electronic component according to claim 1 , wherein the inductor is not electrically connected to the first side-surface electrode at a position closer to the second surface than a position of the plurality of capacitors.
3 . The multilayer electronic component according to claim 1 , further comprising another via wiring line that penetrates through the dielectric layers from the first dielectric layer to the second dielectric layer and electrically connects a second end of the inductor to the second side-surface electrode.
4 . The multilayer electronic component according to claim 1 , further comprising: a lower-surface electrode provided on the first surface and connected to the first side surface electrode, wherein the via wiring line is connected to the lower-surface electrode.
5 . The multilayer electronic component according to claim 1 , wherein a planar area of a via wiring line penetrating through at least one dielectric layer of the dielectric layers other than the via wiring line electrically connected between the first side-surface electrode and the second side-surface electrode is greater than a planar area of the via wiring line electrically connected between the first side-surface electrode and the second side surface electrode.
6 . The multilayer electronic component according to claim 1 , wherein a first end of a first capacitor of the plurality of capacitors is coupled to a path between the first side-surface electrode and the second side surface electrode, and a second end of the first capacitor is coupled to a ground electrode provided on a surface of the multilayer structure.
7 . The multilayer electronic component according to claim 1 , wherein at least a part of the via wiring line does not overlap with the first side-surface electrode in a thickness direction of the first side-surface electrode.
8 . The multilayer electronic component according to claim 1 , wherein a distance between the via wiring line and the first side-surface electrode is 50 μm or greater.
9 . A multilayer electronic component comprising: a multilayer structure in which dielectric layers are stacked in a stack direction, the multilayer structure having a first surface and a second surface provided on respective sides in the stack direction; a first side-surface electrode provided on a side surface of the multilayer structure; an inductor provided in the multilayer structure; a plurality of capacitors provided between the inductor and the first surface; a via wiring line that penetrates through dielectric layers from a first dielectric layer to a second dielectric layer, and electrically connects a first end of the inductor and the first side surface electrode, the first dielectric layer being in contact with the inductor, the second dielectric layer being located closer to the first surface than all of the plurality of capacitors; a second side-surface electrode that is electrically connected to the first side-surface electrode through the inductor and the via wiring line and is provided on the side surface or another side surface of the multilayer structure, and a low-pass filter including the inductor and the plurality of capacitors.
10 . The multilayer electronic component according to claim 9 , further comprising a multiplexer including the low-pass filter.

Description

CROSS-REFERENCE TO RELATED APPLICATION This application is based upon and claims the benefit of priority of the prior Japanese Patent Application No. 2021-157584, filed on Sep. 28, 2021, the entire contents of which are incorporated herein by reference. FIELD A certain aspect of the present embodiments relates to a multilayer electronic component and, more particularly, to a multilayer electronic component having a multilayer structure in which dielectric layers are stacked. BACKGROUND In wireless communication terminals such as smartphones and mobile phones, filters and multiplexers such as diplexers for removing unnecessary interfering waves are used. It is known to use a multilayer structure in which dielectric layers are stacked as a filter and a multiplexer. It is known to provide side-surface electrodes for electrically connecting to the outside on side surfaces of a multilayer structure as disclosed in, for example, International Publication No. 2018/142667 and Japanese Patent Application Laid-Open No. 2017-212717. SUMMARY In the multilayer electronic component having the side-surface electrodes, the inductor can be electrically connected to the side-surface electrodes by connecting the inductor to the side-surface electrodes on the surface of the dielectric layer on which the inductor is formed. The inductor can be inspected by inspecting electric continuity between the side-surface electrodes to which the inductor is connected. However, it is difficult to inspect the dielectric layers on which no inductor is provided. An object of the present disclosure is to easily perform inspection. According to an aspect of the present invention, there is provided a multilayer electronic component including: a multilayer structure in which dielectric layers are stacked in a stack direction, the multilayer structure having a first surface and a second surface provided on respective sides in the stack direction; a first side-surface electrode provided on a side surface of the multilayer structure; an inductor provided in the multilayer structure; a capacitor provided between the inductor and the first surface; a via wiring line that penetrates through dielectric layers from a first dielectric layer to a second dielectric layer, and electrically connects a first end of the inductor and the first side-surface electrode, the first dielectric layer being in contact with the inductor, the second dielectric layer being located closer to the first surface than at least a part of the capacitor; and a second side-surface electrode that is electrically connected to the first side-surface electrode through the inductor and the via wiring line and is provided on the side surface or another side surface of the multilayer structure. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram of an LPF in a first embodiment; FIG. 2A and FIG. 2B are a perspective view and a cross-sectional view of a multilayer electronic component in accordance with a first embodiment, respectively; FIG. 3A to FIG. 3F are plan views illustrating respective dielectric layers in a multilayer structure of the multilayer electronic component in accordance with the first embodiment; FIG. 4A to FIG. 4D are plan views illustrating respective dielectric layers in the multilayer structure of the multilayer electronic component in accordance with the first embodiment: FIG. 5A and FIG. 5B are schematic cross-sectional views of a multilayer electronic component in accordance with a first comparative example: FIG. 6A and FIG. 6B are schematic cross-sectional views of the multilayer electronic component in accordance with the first embodiment; FIG. 7A to FIG. 7C are plan views illustrating respective dielectric layers in a multilayer structure of a multilayer electronic component in accordance with a first variation of the first embodiment: FIG. 8A to FIG. 8C are plan views illustrating respective dielectric lavers in a multilayer structure of a multilayer electronic component in accordance with a second variation of the first embodiment: FIG. 9A to FIG. 9F are plan views illustrating respective dielectric layers in a multilayer structure of a multilayer electronic component in accordance with a third variation of the first embodiment: FIG. 10A to FIG. 10D are plan views illustrating respective dielectric layers in a multilayer structure of a multilayer electronic component in accordance with a third variation of the first embodiment; FIG. 11A to FIG. 11C are plan views illustrating respective dielectric layers in a multilayer structure of a multilayer electronic component in accordance with a fourth variation of the first embodiment; FIG. 12 is a perspective view of a simulated structure: FIG. 13A is a side view of the vicinity of a via wiring line 15b, and FIG. 13B is a plan view of the vicinity of the via wiring line 15b; FIG. 14A to FIG. 14C are graphs presenting the Q factor of an inductor with respect to D1 to D3 in the simulation; FIG. 15A to FIG. 15