US-12620546-B2 - Creating ion energy distribution functions (IEDF)

Abstract

Systems and methods for creating arbitrarily-shaped ion energy distribution functions using shaped-pulse-bias. In an embodiment, a method includes applying a negative jump voltage to an electrode of a process chamber to set a wafer voltage for a wafer, modulating an amplitude of the wafer voltage to produce a train of groups of pulse bursts with different amplitudes, and repeating the modulating of the amplitude of the wafer voltage to repeat the train of the groups of pulse bursts to create an ion energy distribution function having more than one energy peak. In some embodiments, the negative jump voltage can include a single-cycle voltage waveform with a voltage ramp during an ion-current phase, in which the voltage ramp can be positive or negative and a duration of the ion-current phase can comprise more or less than fifty percent of a period of the waveform.

Inventors

• Leonid Dorf
• TRAVIS KOH
• Olivier Luere
• Olivier Joubert
• Philip A. Kraus
• Rajinder Dhindsa
• James Rogers

Assignees

• APPLIED MATERIALS, INC.

Dates

Publication Date

20260505

Application Date

20230711

Claims (20)

1. 1 . A method, comprising: applying a negative jump voltage to an electrode of a process chamber to set a wafer voltage for a wafer, wherein the negative jump voltage comprises a repeating single-cycle voltage waveform with a voltage ramp during an ion-current phase; modulating an amplitude of the wafer voltage to produce a train of groups of pulse bursts with different amplitudes, wherein each group of pulse bursts is composed of pulses having a same amplitude; and repeating the modulating of the amplitude of the wafer voltage to repeat the train of the groups of pulse bursts to create an ion energy distribution function having one or more energy peaks; and wherein the relative number of bursts with a given amplitude in a train determines the relative portion of ions at a specific energy corresponding to that amplitude.
2. 2 . The method of claim 1 , comprising: applying a positive jump voltage to the electrode of the process chamber to neutralize a surface of the wafer.
3. 3 . The method of claim 2 , wherein the positive jump voltage is applied to the electrode of the process chamber prior to applying the negative jump voltage.
4. 4 . The method of claim 1 , wherein the desired ion energy distribution function is created to induce a specific bias voltage waveform on the wafer.
5. 5 . The method of claim 1 , comprising: modulating the wafer voltage at different points in time to create the ion energy distribution function having more than one energy peak.
6. 6 . The method of claim 5 , wherein an ion fraction for each of the energy peaks is determined by a number of pulses produced during a respective modulation of the wafer voltage at the different points in time.
7. 7 . The method of claim 1 , further comprising: applying a positive jump voltage to an electrode of a process chamber to neutralize a surface of a wafer; and applying a ramp voltage to the electrode that at least one of overcompensates or undercompensates for ion current on the wafer.
8. 8 . The method of claim 7 , wherein applying a ramp voltage to the electrode that overcompensates for ion current on the wafer comprises applying a ramp voltage to the electrode that comprises a slope that is more negative than is required to maintain a constant voltage on the wafer.
9. 9 . The method of claim 8 , wherein a minimum voltage and a maximum voltage of a current induced on the wafer determine a width of a resulting ion energy distribution function.
10. 10 . The method of claim 7 , wherein applying a ramp voltage to the electrode that undercompensates for ion current on the wafer comprises applying a ramp voltage to the electrode that comprises a slope that is less negative than is required to maintain a constant voltage on the wafer.
11. 11 . The method of claim 10 , wherein a minimum voltage and a maximum voltage of a current induced on the wafer determine a width of a resulting ion energy distribution function.
12. 12 . The method of claim 7 , comprising: adjusting a slope of the ramp voltage to create a desired ion energy distribution function to induce a specific bias voltage waveform on the wafer.
13. 13 . The method of claim 1 , further comprising: a period in between the groups of pulses where no voltage pulses are provided to the electrode.
14. 14 . The method of claim 1 , wherein the voltage ramp during the ion-current phase comprises a positive voltage ramp.
15. 15 . The method of claim 1 , wherein the voltage ramp during the ion-current phase comprises a negative voltage ramp.
16. 16 . The method of claim 1 , wherein the voltage ramp during the ion-current phase comprises no voltage ramp.
17. 17 . The method of claim 1 , wherein a duration of the ion-current phase comprises less than fifty percent of a period of the waveform.
18. 18 . The method of claim 1 , wherein a duration of the ion-current phase comprises more than fifty percent of a period of the waveform.
19. 19 . The method of claim 1 , wherein the waveform comprises a positive peak voltage.
20. 20 . The method of claim 1 , wherein the waveform comprises a negative peak voltage.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application is a Continuation in Part of and claims the benefit of U.S. patent application Ser. No. 17/377,639, filed Jul. 16, 2021, which is a Continuation of and claims the benefit of U.S. patent application Ser. No. 16/867,034, filed May 5, 2020, which is a continuation of U.S. patent application Ser. No. 16/405,377, filed May 7, 2019, issued as U.S. Pat. No. 10,685,807 on Jun. 16, 2020, which is a continuation of U.S. patent application Ser. No. 15/834,939, filed Dec. 7, 2017, issued as U.S. Pat. No. 10,312,048 on Jun. 4, 2019, which claims the benefit of U.S. Provisional Patent Application Ser. No. 62/433,204, filed Dec. 12, 2016. Each of the aforementioned related patent applications is herein incorporated by reference in its entirety. FIELD Embodiments of the present disclosure generally relate to systems and methods for processing a substrate and, particularly, to systems and methods for plasma processing of substrates. BACKGROUND A typical Reactive Ion Etch (RIE) plasma processing chamber includes a radiofrequency (RF) bias generator, which supplies an RF voltage to a “power electrode”, a metal baseplate embedded into the “electrostatic chuck” (ESC), more commonly referred to as the “cathode”. FIG. 1(a) depicts a plot of a typical RF voltage to be supplied to a power electrode in a typical processing chamber. The power electrode is capacitively coupled to the plasma of a processing system through a layer of ceramic, which is a part of the ESC assembly. Non-linear, diode-like nature of the plasma sheath results in rectification of the applied RF field, such that a direct-current (DC) voltage drop, or “self-bias”, appears between the cathode and the plasma. This voltage drop determines the average energy of the plasma ions accelerated towards the cathode, and thus the etch anisotropy. More specifically, ion directionality, the feature profile, and selectivity to the mask and the stop-layer are controlled by the Ion Energy Distribution Function (IEDF). In plasmas with RF bias, the IEDF typically has two peaks, at low and high energy, and some ion population in between. The presence of the ion population in between the two peaks of the IEDF is reflective of the fact that the voltage drop between the cathode and the plasma oscillates at the bias frequency. When a lower frequency, for example 2 MHz, RF bias generator is used to get higher self-bias voltages, the difference in energy between these two peaks can be significant and the etch due to the ions at low energy peak is more isotropic, potentially leading to bowing of the feature walls. Compared to the high-energy ions, the low-energy ions are less effective at reaching the corners at the bottom of the feature (due to charging effect, for example), but cause less sputtering of the mask material. This is important in high aspect ratio etch applications, such as hard-mask opening. As feature sizes continue to diminish and the aspect ratio increases, while feature profile control requirements get more stringent, it becomes more desirable to have a well-controlled IEDF at the substrate surface during processing. A single-peak IEDF can be used to construct any IEDF, including a two-peak IEDF with independently controlled peak heights and energies, which is very beneficial for high-precision plasma processing. Creating a single-peak IEDF requires having a nearly-constant voltage at the substrate surface with respect to plasma, i.e. the sheath voltage, which determines the ion energy. Assuming time-constant plasma potential (which is typically close to zero or a ground potential in processing plasmas), this requires maintaining a nearly constant voltage at the substrate with respect to ground, i.e. substrate voltage. This cannot be accomplished by simply applying a DC voltage to the power electrode, because of the ion current constantly charging the substrate surface. As a result, all of the applied DC voltage would drop across the substrate and the ceramic portion of the ESC (i.e., chuck capacitance) instead of the plasma sheath (i.e., sheath capacitance). To overcome this, a special shaped-pulse bias scheme has been developed that results in the applied voltage being divided between the chuck and the sheath capacitances (we neglect the voltage drop across the substrate, as its capacitance is usually much larger than the sheath capacitance). This scheme provides compensation for the ion current, allowing for the sheath voltage and the substrate voltage to remain constant for up to 90% of each bias voltage cycle. More accurately, this biasing scheme allows maintaining a specific substrate voltage waveform, which can be described as a periodic series of short positive pulses on top of the negative dc-offset (FIG. 1(b)). During each pulse, the substrate potential reaches the plasma potential and the sheath briefly collapses, but for ˜90% of each cycle the sheath voltage remains constant and equal to the negative v