Search

US-12620888-B2 - Analog frontend circuit and signal filtering method for photoplethysmography

US12620888B2US 12620888 B2US12620888 B2US 12620888B2US-12620888-B2

Abstract

An analog frontend circuit for photoplethysmography includes a current control circuit and a monitoring circuit both coupled with a first node, and also includes a reading circuit coupled with the first node through the monitoring circuit. The current control circuit generates a first sub-current which is part of an input current flowing to the first node. In a tracking period, the monitoring circuit controls the current control circuit to determine magnitude of the first sub-current to control a voltage of the first node to track a reference voltage. In a sensing period after the tracking period, the monitoring circuit controls the current control circuit to keep the first sub-current determined in the tracking period. After the first sub-current is kept, the monitoring circuit provides a second sub-current which is part of the input current, and the reading circuit converts the second sub-current to an output voltage.

Inventors

  • Chia-Liang Lin
  • Yen-Wei Liu

Assignees

  • REALTEK SEMICONDUCTOR CORPORATION

Dates

Publication Date
20260505
Application Date
20240125

Claims (20)

  1. 1 . An analog frontend circuit for photoplethysmography, comprising: a first current control circuit, coupled with a first node, and configured to generate a first sub-current, wherein the first sub-current is part of an input current flowing to the first node; a monitoring circuit, coupled with the first node, and configured to receive a reference voltage, wherein in a tracking period, the monitoring circuit is configured to control the first current control circuit to determine a magnitude of the first sub-current, in order to control a voltage of the first node to track the reference voltage; and a reading circuit, coupled with the first node through the monitoring circuit, wherein in a sensing period after the tracking period, the monitoring circuit is configured to control the first current control circuit to keep the first sub-current to have the magnitude of the first sub-current determined in the tracking period, wherein after the first sub-current is kept, the monitoring circuit is configured to transmit a second sub-current from the first node to the reading circuit so that the reading circuit is configured to convert the second sub-current to an output voltage, wherein the second sub-current is part of the input current.
  2. 2 . The analog frontend circuit of claim 1 , wherein the monitoring circuit comprises: an amplifier, comprising a first input terminal, a second input terminal and an output terminal, wherein the second input terminal of the amplifier is coupled with the reading circuit; a sample-and-hold circuit, coupled with the output terminal of the amplifier and the first current control circuit, configured to sample an output of the amplifier, wherein the sample-and-hold circuit is configured to output the sampled output of the amplifier to control the first current control circuit to determine the magnitude of the first sub-current; and a switch array, coupled with the first node, the first input terminal and the second input terminal of the amplifier, configured to receive the reference voltage, wherein in the tracking period, the switch array is configure to respectively provide the second sub-current and the reference voltage to the first input terminal and the second input terminal of the amplifier, and wherein in the sensing period, the switch array is configure to respectively provide the second sub-current and the reference voltage to the second input terminal and the first input terminal of the amplifier.
  3. 3 . The analog frontend circuit of claim 2 , wherein the sample-and-hold circuit comprises: a sampling capacitor, comprising a first terminal and a second terminal, wherein the first terminal of the sampling capacitor is coupled with the first current control circuit, and the second terminal of the sampling capacitor is configured to receive a first operation voltage; and a sampling switch, coupled between the output terminal of the amplifier and the first terminal of the sampling capacitor, wherein the sampling switch is conducted in the tracking period and is switched off in the sensing period.
  4. 4 . The analog frontend circuit of claim 2 , wherein the reading circuit comprises: at least one switching circuit, configured to be switched off in the tracking period and conducted in the sensing period; and a storage array, comprising at least one resistor coupled in parallel, and coupled with the at least one switching circuit, wherein the at least one switching circuit and the storage array are coupled between the second input terminal of the amplifier and the output terminal of the amplifier.
  5. 5 . The analog frontend circuit of claim 2 , wherein the reading circuit comprises: a first switching circuit; a second switching circuit; a first capacitor; and a second capacitor, wherein two terminals of the first capacitor and two terminals of the second capacitor are coupled with the second input terminal of the amplifier through the first switching circuit, and the two terminals of the first capacitor and the two terminals of the second capacitor are coupled with the output terminal of the amplifier through the second switching circuit, wherein in the sensing period, the first switching circuit and the second switching circuit form a first circuit topology to transmit the second sub-current to the first capacitor and the second capacitor and to configure the first capacitor and the second capacitor to be coupled in parallel between the second input terminal of the amplifier and the output terminal of the amplifier, wherein after the first circuit topology is formed, the first switching circuit and the second switching circuit form a second circuit topology to transmit the second sub-current to the second capacitor, wherein after the second circuit topology is formed, the first switching circuit and the second switching circuit form a third circuit topology to conduct charge sharing between the first capacitor and the second capacitor.
  6. 6 . The analog frontend circuit of claim 2 , wherein the reading circuit comprises: a first switching circuit; a second switching circuit; a first capacitor; and a second capacitor, wherein two terminals of the first capacitor and two terminals of the second capacitor are coupled with the second input terminal of the amplifier through the first switching circuit, and the two terminals of the first capacitor and the two terminals of the second capacitor are coupled with the output terminal of the amplifier through the second switching circuit, wherein in the sensing period, the first switching circuit and the second switching circuit form a first circuit topology to transmit the second sub-current to the first capacitor, wherein after the first circuit topology is formed, the first switching circuit and the second switching circuit form a second circuit topology to transmit the second sub-current to the second capacitor, wherein after the second circuit topology is formed, the first switching circuit and the second switching circuit form a third circuit topology to conduct charge sharing between the first capacitor and the second capacitor.
  7. 7 . The analog frontend circuit of claim 1 , wherein the first current control circuit comprises: a transistor, comprising a first terminal, a second terminal and a control terminal, wherein the first sub-current flows through the transistor, wherein the first terminal of the transistor is coupled with the first node, the second terminal of the transistor is configured to receive a first operation voltage, and the control terminal of the transistor is coupled with the monitoring circuit to receive a control signal generated by the monitoring circuit according to the voltage of the first node and the reference voltage.
  8. 8 . The analog frontend circuit of claim 1 , wherein the first current control circuit comprises: a transistor, comprising a first terminal, a second terminal and a control terminal, wherein the first terminal of the transistor is configured to receive a second operation voltage, and the control terminal of the transistor is coupled with the monitoring circuit to receive a control signal generated by the monitoring circuit according to the voltage of the first node and the reference voltage; and a first current mirror, comprising an input terminal and an output terminal, wherein the input terminal of the first current mirror is coupled with the second terminal of the transistor, and the output terminal of the first current mirror is coupled with the first node, wherein the first sub-current flows through the output terminal of the first current mirror.
  9. 9 . The analog frontend circuit of claim 1 , further comprising: a second current control circuit, coupled with the first node, and configured to generate a third sub-current in the sensing period, wherein the third sub-current is part of the input current, wherein the second current control circuit is configured to determine a magnitude of the third sub-current according to a magnitude of the second sub-current in a former sensing period.
  10. 10 . The analog frontend circuit of claim 9 , wherein the second current control circuit comprises: a second current mirror, comprising an input terminal and at least one output terminal, wherein the input terminal of the second current mirror is configured to receive a reference current; an enablement switch, comprising a first terminal and a second terminal, and configured to be conducted in the sensing period, wherein the first terminal of the enablement switch is coupled with the first node; and a switch array, coupled between the second terminal of the enablement switch and the at least one output terminal of the second current mirror, and controlled by a calibration signal related to the magnitude of the second sub-current in the former sensing period.
  11. 11 . A signal filtering method for photoplethysmography, comprising: monitoring, in a tracking period and by a monitoring circuit, a voltage of a first node and a reference voltage, wherein an input current flows to the first node; controlling, in the tracking period and by the monitoring circuit, a first current control circuit coupled to the first node to determine a magnitude of a first sub-current, wherein the first sub-current is part of the input current and generated by the first current control circuit; in a sensing period after the tracking period, controlling, by the monitoring circuit, the first current control circuit to keep the first sub-current to have the magnitude of the first sub-current determined in the tracking period; and after the first sub-current is kept, converting, by a reading circuit coupled with the first node through the monitoring circuit, a second sub-current transmitted from the first node through the monitoring circuit to the reading circuit to an output voltage, wherein the second sub-current is part of the input current.
  12. 12 . The signal filtering method of claim 11 , wherein monitoring the voltage of the first node and the reference voltage comprises: receiving the second sub-current and the reference voltage by a switch array of the monitoring circuit; and transmitting the second sub-current and the reference voltage respectively to a first input terminal and a second input terminal of an amplifier of the monitoring circuit, wherein the second input terminal of the amplifier is coupled with the reading circuit.
  13. 13 . The signal filtering method of claim 12 , wherein controlling the first current control circuit to determine the magnitude of the first sub-current comprises: sampling an output of the amplifier by a sample-and-hold circuit coupled with an output terminal of the amplifier and the first current control circuit; and outputting, by the sample-and-hold circuit, the sampled output of the amplifier to the first current control circuit, so as to control the first current control circuit to determine the magnitude of the first sub-current.
  14. 14 . The signal filtering method of claim 13 , wherein controlling the first current control circuit to keep the first sub-current to have the magnitude of the first sub-current determined in the tracking period comprises: switching off a sampling switch of the sample-and-hold circuit in the sensing period, wherein the sampling switch is coupled between the output terminal of the amplifier and a first terminal of a sampling capacitor of the sample-and-hold circuit, and is conducted in the tracking period; and outputting the sampled output of the amplifier, in the sensing period and by the first terminal of the sampling capacitor of the sample-and-hold circuit, to the first current control circuit to control the first current control circuit to keep the first sub-current to have the magnitude of the first sub-current determined in the tracking period.
  15. 15 . The signal filtering method of claim 12 , wherein converting the second sub-current to the output voltage comprises: receiving the second sub-current by a storage array of the reading circuit, wherein the reading circuit further comprises at least one switching circuit, and the storage array comprises at least one resistor, wherein the at least one switching circuit is configured to be switched off in the tracking period and conducted in the sensing period, wherein the storage array and the at least one switching circuit are coupled between the second input terminal of the amplifier and an output terminal of the amplifier; and in response to the second sub-current flowing through the storage array and the at least one switching circuit, generating the output voltage at the output terminal of the amplifier.
  16. 16 . The signal filtering method of claim 12 , wherein converting the second sub-current to the output voltage comprises: in the sensing period, controlling a first switching circuit and a second switching circuit of the reading circuit to form a first circuit topology, in order to transmit the second sub-current to a first capacitor and a second capacitor of the reading circuit and to configure the first capacitor and the second capacitor to be coupled in parallel between the second input terminal of the amplifier and an output terminal of the amplifier, wherein two terminals of the first capacitor and two terminals of the second capacitor are coupled with the second input terminal of the amplifier through the first switching circuit, and the two terminals of the first capacitor and the two terminals of the second capacitor are coupled with the output terminal of the amplifier through the second switching circuit; after the first circuit topology is formed, controlling the first switching circuit and the second switching circuit to form a second circuit topology to transmit the second sub-current to the second capacitor; and after the second circuit topology is formed, controlling the first switching circuit and the second switching circuit to form a third circuit topology to conduct charge sharing between the first capacitor and the second capacitor.
  17. 17 . The signal filtering method of claim 12 , wherein converting the second sub-current to the output voltage comprises: in the sensing period, controlling a first switching circuit and a second switching circuit of the reading circuit to form a first circuit topology, in order to transmit the second sub-current to a first capacitor of the reading circuit, wherein two terminals of the first capacitor are coupled with the second input terminal of the amplifier through the first switching circuit, and the two terminals of the first capacitor are coupled with an output terminal of the amplifier through the second switching circuit; after the first circuit topology is formed, controlling the first switching circuit and the second switching circuit to form a second circuit topology to transmit the second sub-current to a second capacitor of the reading circuit, wherein two terminals of the second capacitor are coupled with the second input terminal of the amplifier through the first switching circuit, and the two terminals of the second capacitor are coupled with the output terminal of the amplifier through the second switching circuit; and after the second circuit topology is formed, controlling the first switching circuit and the second switching circuit to form a third circuit topology to conduct charge sharing between the first capacitor and the second capacitor.
  18. 18 . The signal filtering method of claim 11 , wherein controlling the first current control circuit to determine the magnitude of the first sub-current comprises: generating a control signal by the monitoring circuit according to the voltage of the first node and the reference voltage; and using a transistor of the first current control circuit to determine the magnitude of the first sub-current according to the control signal, wherein the first sub-current flows through the transistor, wherein a first terminal of the transistor is coupled with the first node, a second terminal of the transistor is configured to receive a first operation voltage, and a control terminal of the transistor is coupled with the monitoring circuit to receive the control signal.
  19. 19 . The signal filtering method of claim 11 , wherein controlling the first current control circuit to determine the magnitude of the first sub-current comprises: generating a control signal by the monitoring circuit according to the voltage of the first node and the reference voltage; receiving the control signal by a control terminal of a transistor of the first current control circuit, wherein a first terminal of the transistor is configured to receive a second operation voltage; and using a first current mirror of the first current control circuit to determine the magnitude of the first sub-current, wherein an input terminal of the first current mirror is coupled with a second terminal of the transistor, and an output terminal of the first current mirror is coupled with the first node, wherein the first sub-current flows through the output terminal of the first current mirror.
  20. 20 . The signal filtering method of claim 11 , further comprising: determining, in the sensing period and by a second current control circuit coupled with the first node, magnitude of a third sub-current according to magnitude of the second sub-current in a former sensing period, wherein the third sub-current is generated by the second current control circuit and is part of the input current.

Description

BACKGROUND Technical Field The present disclosure relates to photoplethysmography. More particularly, the present disclosure relates to an analog front end circuit and a signal filtering method for photoplethysmography. Description of Related Art Photoplethysmography (PPG) is an optical method to measure heart rate and blood oxygen saturation. In PPG, light-emitting diodes (LEDs) emit light toward skin of a user, and the light reflect by blood and human tissue of the user is measured and transformed to a current signal by an optical sensor. However, a DC component of the current signal may be dominated by slowly-changed ambient light (e.g., light from a light bulb), and an AC component of the current signal may be dominated by fast-changed ambient light (e.g., light change caused by activities of the user). To improve accuracy of PPG, the components of the current signal that are caused by the ambient light should be filtered out, so as to facilitate analysis of a back-end circuit to the AC component and DC component of the current signal that are related to the blood and the human tissue. SUMMARY The present disclosure provides an analog frontend circuit for photoplethysmography, which includes a first current control circuit, a monitoring circuit and a reading circuit. The first current control circuit is coupled with a first node, and configured to generate a first sub-current. The first sub-current is part of an input current flowing to the first node. The monitoring circuit is coupled with the first node, and is configured to receive a reference voltage. In a tracking period, the monitoring circuit is configured to control the first current control circuit to determine magnitude of the first sub-current, in order to control a voltage of the first node to track the reference voltage. The reading circuit is coupled with the first node through the monitoring circuit. In a sensing period after the tracking period, the monitoring circuit is configured to control the first current control circuit to keep the first sub-current to have the magnitude of the first sub-current determined in the tracking period. After the first sub-current is kept, the monitoring circuit is configured to transmit a second sub-current from the first node to the reading circuit so that the reading circuit is configured to convert the second sub-current to an output voltage. The second sub-current is part of the input current. The present disclosure provides a signal filtering method for photoplethysmography. The signal filtering method includes the following steps: monitoring, in a tracking period and by a monitoring circuit, a voltage of a first node and a reference voltage, wherein an input current flows to the first node; controlling, in the tracking period and by the monitoring circuit, a first current control circuit coupled to the first node to determine magnitude of a first sub-current, in which the first sub-current is part of the input current and generated by the first current control circuit; in a sensing period after the tracking period, controlling, by the monitoring circuit, the first current control circuit to keep the first sub-current to have the magnitude of the first sub-current determined in the tracking period; and after the first sub-current is kept, converting, by a reading circuit coupled with the first node through the monitoring circuit, a second sub-current transmitted from the first node through the monitoring circuit to the reading circuit to an output voltage, in which the second sub-current is part of the input current. It is to be understood that both the foregoing general description and the following detailed description are by examples, and are intended to provide further explanation of the disclosure as claimed. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a simplified functional block diagram of an analog frontend circuit for photoplethysmography, according to one embodiment of the present disclosure. FIG. 2 is a schematic diagram of the input current according to one embodiment of the present disclosure. FIG. 3 is a flowchart of a signal filtering method for photoplethysmography. FIG. 4 is a schematic diagram of a first current control circuit according to one embodiment of the present disclosure. FIG. 5 is a schematic diagram of a reading circuit according to one embodiment of the present disclosure. FIG. 6 is a schematic diagram of a reading circuit according to one embodiment of the present disclosure. FIG. 7 is a waveform schematic diagram of the reading circuit according to one embodiment of the present disclosure. FIG. 8 is a waveform schematic diagram of the reading circuit according to one embodiment of the present disclosure. FIG. 9 is a schematic diagram of a second current control circuit according to one embodiment of the present disclosure. DETAILED DESCRIPTION Reference will now be made in detail to the present embodiments of the disclosure, examples of which are illustrated in the