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US-12620911-B2 - Parallel multi-converter and capacity design method therefor

US12620911B2US 12620911 B2US12620911 B2US 12620911B2US-12620911-B2

Abstract

Disclosed are a parallel multi-converter and a capacity design method therefor. A first output current model and a second output current model are generated by respectively acquiring electrical parameters of an inductive voltage source converter and a capacitive voltage source converter, and the first output current model and the second output current model are integrated under the same output current condition, so that it may be ensured that the inductive voltage source converter and the capacitive voltage source converter have the same current generating ability; meanwhile, a coupling inductance relationship between the inductive voltage source converter and the capacitive voltage source converter is combined to further obtain the optimal capacity value of the inductive voltage source converter and the optimal capacity value of the capacitive voltage source converter. Therefore, the L-VSC and the LC-VSC have the same current generating ability, and the multi-converter has lower total voltage capacity.

Inventors

  • Man-Chung Wong
  • YING PANG

Assignees

  • UNIVERSITY OF MACAU

Dates

Publication Date
20260505
Application Date
20220902

Claims (8)

  1. 1 . A capacity design method for a parallel multi-converter, comprising the steps of: acquiring, by electrical sensors of the parallel multi-converter, an electrical parameter of an inductive voltage source converter to construct a first output current model; acquiring, by the electrical sensors of the parallel multi-converter, an electrical parameter of a capacitive voltage source converter to construct a second output current model; correlating, by a processing unit operatively coupled to the electrical sensors, the first output current model to the second output current model at the same preset output current to generate a direct current (DC) voltage relationship model; generating, by the processing unit, a capacity relationship model according to a relationship between coupling inductance in the inductive voltage source converter and coupling inductance in the capacitive voltage source converter and the DC voltage relationship model; and acquiring, by the processing unit, an inductive voltage source converter capacity corresponding to the inductive voltage source converter and a capacitive voltage source converter capacity corresponding to the capacitive voltage source converter according to the capacity relationship model.
  2. 2 . The capacity design method for the parallel multi-converter of claim 1 , wherein the step of acquiring an electrical parameter of an inductive voltage source converter to construct a first output current model comprises: acquiring a three-phase input voltage of a grid; acquiring an inductance value of the coupling inductance and a three-bridge voltage in the inductive voltage source converter; constructing the first output current model according to the three-phase input voltage of the grid as well as the three-phase coupling inductance value and the three-bridge voltage of the inductive voltage source converter: i cxL = 1 L xL ⁢ ∫ 0 T ( v invxL - v sx ) ⁢ dt = v invxL - v sx L xL · T , wherein i cxL is a three-phase injection current, L xL is the inductance value of the coupling inductance, v sx is the three-phase input voltage of the grid, V inwxL is the three-bridge voltage, T is a switching period, and x is phase a, phase b or phase c in three-phase power.
  3. 3 . The capacity design method for the parallel multi-converter of claim 1 , wherein the step of acquiring an electrical parameter of a capacitive voltage source converter to construct a second output current model comprises: acquiring a three-phase input voltage of a grid; acquiring the coupling inductance, a three-bridge voltage, and a three-phase coupling inductance voltage in the capacitive voltage source converter; constructing the second output current model according to the three-phase input voltage of the grid as well as the coupling inductance, the three-bridge voltage, and the three-phase coupling inductance voltage in the capacitive voltage source converter: i cxLC = ( v invxLC - v sx + v CxLC ( 0 ) L xLC · ω ) ⁢ sin ⁡ ( ω ⁢ T ) + i cxLC ( 0 ) ⁢ cos ⁡ ( ω ⁢ T ) , wherein i cxLC is a three-phase injection current, L xLC is a three-phase coupling inductance value, v sx is the three-phase input voltage of the grid, V invxLC is the three-bridge voltage, T is a switching period, V CxLC is the three-phase coupling inductance voltage, ω is an electrical angle which represents an angle among three-phase power, and x is phase a, phase b or phase c in the three-phase power.
  4. 4 . The capacity design method for the parallel multi-converter of claim 1 , wherein after the step of correlating the first output current model to the second output current model at the same preset output current to generate a DC voltage relationship model, the capacity design method comprises: performing data model approximate calculation on the first output current model and the second output current model to obtain an approximate DC voltage relationship model: V dcLC =V dcL− A·V sx , wherein V sx is an effective value of a single-phase voltage of the grid, A is a relationship between a DC voltage and a voltage peak of the grid, and a numerical value thereof is related to a line form of the grid, V dcLC is the lowest-limit DC voltage of the capacitive voltage source converter, and V dcL , is the lowest-limit DC voltage of the inductive voltage source converter.
  5. 5 . The capacity design method for the parallel multi-converter of claim 4 , wherein the step of generating a capacity relationship model according to a relationship between coupling inductance in the inductive voltage source converter and coupling inductance in the capacitive voltage source converter and the DC voltage relationship model comprises: setting the coupling inductance in the inductive voltage source converter and the coupling inductance in the capacitive voltage source converter to have the same value, and acquiring the capacity relationship model in combination with the approximate DC voltage relationship model: V dcLC · I cx ︸ S LC = V dcL · I cs ︸ S L - A · V sx · I cx , wherein S LC is the capacity of the capacitive voltage source converter, I CX is a coupling inductance current, and S L is the capacity of the inductive voltage source converter; and the step of acquiring the capacity corresponding to the inductive voltage source converter and the capacity corresponding to the capacitive voltage source converter according to the capacity relationship model comprises: solving S LC and S L to acquire the capacity corresponding to the inductive voltage source converter and the capacity corresponding to the capacitive voltage source converter.
  6. 6 . The capacity design method for the parallel multi-converter of claim 4 , wherein the step of acquiring the capacity corresponding to the capacitive voltage source converter according to the capacity relationship model further comprises: setting a voltage constraint model to limit a low-limit DC voltage of the capacitive voltage source converter; wherein the voltage constraint model is: V dcLC ≥ A · V sx 2 · ( 1 - Q Lf Q LC ) 2 + ∑ n = 2 ∞ I cxn 2 ⁢ X : LCn 2 , wherein Q Lf is an actually measured reactive power of a load, Q LC is reactive power provided by a coupling part, I cxn is a measured DC current value of each harmonic emitted by the converter, and X LCn is the corresponding impedance of the coupling part at the n th harmonic.
  7. 7 . The capacity design method for the parallel multi-converter of claim 6 , wherein the step of setting a voltage constraint model to limit a low-limit DC voltage of the capacitive voltage source converter comprises: acquiring the actually measured reactive power of the load and the reactive power provided by the coupling part according to the voltage frequency of the grid as well as the coupling inductance and a capacitance value in the capacitive voltage source converter: Q LC = ( 2 ⁢ π ⁢ fL xLC - 1 2 ⁢ π ⁢ fC xLC ) · V sx 2 , X LCn = ( 2 ⁢ π ⁢ fnL xLC - 1 2 ⁢ π ⁢ fC xLC ) , wherein L and C are respectively the coupling inductance and the capacitance value of the capacitive voltage source converter, and f is the voltage frequency of the grid.
  8. 8 . The capacity design method for the parallel multi-converter of claim 4 , wherein the step of acquiring the capacity corresponding to the inductive voltage source converter according to the capacity relationship model further comprises: setting a voltage constraint model to limit a low-limit DC voltage of the inductive voltage source converter; wherein the voltage constraint model is: V dcL ≥ A · V sx 2 + ∑ n = 2 ∞ I cxn 2 ⁢ X : Ln 2 , wherein X Ln is impedance corresponding to the coupling part at the n th harmonic.

Description

TECHNICAL FIELD The present disclosure relates to the field of circuit design, in particular to a parallel multi-converter and a capacity design method therefor. BACKGROUND With the construction of ultra-high voltage transmission lines, the load of high-power industrial power (especially motors, electric heaters, etc.) has increased significantly, and therefore, high-power converters that need to be matched are also in urgent need of development. Among them, an important function of the high-power converters is to control power quality problems at high power. The power quality problems have been widely valued by the industrial community. An APF (active power filter) consisting of a VSC (Voltage Source Converter) is used. As an effective and important means for solving the power quality problems, the APF is one of hot topics in current academic research. Solving the power quality problems in a high-power environment and studying the importance of a power compensator are mainly reflected in the following two aspects. Firstly, the operation of nonlinear loads inevitably causes power quality problems such as low power factor, harmonic pollution, and three-phase imbalance. The power quality problems may not only increase the transmission loss, but also reduce the reliability, safety, and life cycle of electronic equipment. Secondly, for common high-power electrical equipment, such as large-scale power transmission and transformation equipment, high-speed trains, and large computers, most of them have extremely high economic and even strategic values, and therefore, it is extremely important to protect them. For maintaining their uninterrupted operation, the dynamic performance of an electric energy compensator must be guaranteed. At the same time, an energy compensator has inherent loss, and if its loss can be minimized, the total efficiency of the energy compensator will be increased. For existing high-power compensation solutions, if the capacity of the compensator needs to be expanded, it is common practice to use several identical inductive voltage source converters (L-VSCs) in parallel to expand the current capacity of the compensator. Due to material and technical limitations, the maximum current that can pass through each VSC device is limited, and the higher the maximum current, the higher the manufacturing cost. Therefore, a shunt method is usually used to reduce the current passing through each power switch. The disadvantages of this shunt method are also very obvious. Its manufacturing cost is increased proportionally with the increase in demand capacity, and thus, the difficulty of its control will be greatly increased. On the other hand, in medium and low power application scenarios, there is a capacitive voltage source converter (LC-VSC) that is composed by connecting capacitive passive devices and VSCs in series. In the prior art, there is a technical solution that the overall capacity of the method is expanded by parallel connection between the L-VSC and the LC-VSC, but the manner that the capacity and parameters of the L-VSC and the LC-VSC should be designed to make the LC-VSC and the L-VSC have the same current generating ability has not been mentioned in the prior art. In recent years, patent disclosures and papers in the field of parallel high-power power quality compensators and converters are reviewed and compared as follows: In the prior art [1] (L. Asiminoaei, E. Aeloiza, P. N. Enjeti, and F. Blaabjerg, “Shunt Active-Power-Filter Topology Based on Parallel Interleaved Inverters,” IEEE Transactions on Industrial Electronics, vol. 55, no. 3, pp. 1175-1189, March 2008, doi: 10.1109/TIE.2007.907671), a method for scaling the capacity of multiple parallel converters was firstly proposed, but it was simply a simple direct parallel connection of multiple L-VSCs with high direct current (DC) voltages. Based on this structure, in the prior art [2] (M. I. Milanés-Montero, E. Romero-Cadaval, and F. Barrero-González, “Hybrid Multiconverter Conditioner Topology for High-Power Applications,” IEEE Transactions on Industrial Electronics, vol. 58, no. 6, pp. 2283-2292, June 2011, doi: 10.1109/TIE.2010.2062478), a method for parallel connection between an L-VSC and an LC-VSC was proposed for the first time, which combines with a method for setting a resonance point of a passive part C near the 3rd, 5th, and 7th harmonics, so that the capacity of some harmonic compensation is reduced. However, in this article, the L-VSC and the LC-VSC share the same high DC voltage, so the characteristics of low DC voltage, low capacity, and low loss of the LC-VSC are not reflected. In the prior art [3] (H. Bal, X. Wang, F. Blaabjerg, and P. C. Loh, “Harmonic Analysis and Mitigation of Low-Frequency Switching Voltage Source Inverter With Auxiliary VSI,” IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 6, no. 3, pp. 1355-1365, September 2018, doi: 10.1109/JESTPE.2018.2789982.), an independent DC voltag