Search

US-12620936-B2 - Mixer with reduced local oscillator (LO) leakage

US12620936B2US 12620936 B2US12620936 B2US 12620936B2US-12620936-B2

Abstract

A mixer includes a mixing stage, and a first transistor and a second transistor coupled to the mixing stage. A gate of the first transistor is coupled to a first input of the mixer, and a gate of the second transistor is coupled to a second input of the mixer. The mixer also includes a first source resistor coupled to a source of the first transistor, and a second source resistor coupled to a source of the second transistor. The mixer further includes an amplifier having a first input coupled to the source of the first transistor, and a second input coupled to the source of the second transistor. The amplifier is configured to adjust at least one bias voltage of at least one of the first transistor and the second transistor based on a differential voltage between the first and second inputs of the amplifier.

Inventors

  • Muhammad Hassan

Assignees

  • QUALCOMM INCORPORATED

Dates

Publication Date
20260505
Application Date
20231214

Claims (10)

  1. 1 . A mixer, comprising: a mixing stage; a first transistor, wherein a gate of the first transistor is coupled to a first input of the mixer, and a drain of the first transistor is coupled to the mixing stage; a second transistor, wherein a gate of the second transistor is coupled to a second input of the mixer, and a drain of the second transistor is coupled to the mixing stage; a first source resistor coupled to a source of the first transistor; a second source resistor coupled to a source of the second transistor; and an amplifier having a first input, a second input, a first output, and a second output, wherein the first input of the amplifier is coupled to the source of the first transistor, the second input of the amplifier is coupled to the source of the second transistor, the first output of the amplifier is coupled to a back gate of the first transistor, the second output of the amplifier is coupled to a back gate of the second transistor, and the amplifier is configured to adjust a first bias voltage at the back gate of the first transistor and a second bias voltage at the back gate of the second transistor in a direction that reduces a differential voltage between the first input of the amplifier and the second input of the amplifier.
  2. 2 . The mixer of claim 1 , wherein the first source resistor is coupled between the source of the first transistor and a ground, and the second source resistor is coupled between the source of the second transistor and the ground.
  3. 3 . The mixer of claim 1 , wherein: the first transistor is configured to receive a first input signal via the first input of the mixer, and generate a first current based on the first input signal; and the second transistor is configured to receive a second input signal via the second input of the mixer, and generate a second current based on the second input signal.
  4. 4 . The mixer of claim 3 , wherein the mixing stage is configured to receive a first local oscillator (LO) signal and a second LO signal, mix the first current with the first LO signal and the second LO signal, and mix the second current with the first LO signal and the second LO signal.
  5. 5 . The mixer of claim 4 , wherein the first input signal comprises a first intermediate frequency (IF) signal, and the second input signal comprises a second IF signal.
  6. 6 . The mixer of claim 1 , wherein the mixing stage comprises: a third transistor, wherein a drain of the third transistor is coupled to a first node, the gate of the third transistor is coupled to a third input of the mixer, and a source of the third transistor is coupled to the drain of the first transistor; a fourth transistor, wherein a drain of the fourth transistor is coupled to a second node, the gate of the fourth transistor is coupled to a fourth input of the mixer, and a source of the fourth transistor is coupled to the drain of the first transistor; a fifth transistor, wherein a drain of the fifth transistor is coupled to the first node, the gate of the fifth transistor is coupled to the fourth input of the mixer, and a source of the fifth transistor is coupled to the drain of the second transistor; and a sixth transistor, wherein a drain of the sixth transistor is coupled to the second node, the gate of the sixth transistor is coupled to the third input of the mixer, and a source of the sixth transistor is coupled to the drain of the second transistor.
  7. 7 . The mixer of claim 6 , further comprising: a first load coupled between the first node and a supply rail; and a second load coupled between the second node and the supply rail.
  8. 8 . The mixer of claim 6 , wherein the third input of the mixer is configured to receive a first local oscillator (LO) signal, and the fourth input of the mixer is configured to receive a second LO signal.
  9. 9 . The mixer of claim 8 , wherein the first input of the mixer is configured to receive a first intermediate frequency (IF) signal, and the second input of the mixer is configured to receive a second IF signal.
  10. 10 . A method of operating a mixer, wherein the mixer includes a mixing stage, a first transistor coupled to the mixing stage, and a second transistor coupled to the mixing stage, the method comprising: generating a first current based on a first input signal using the first transistor; generating a second current based on a second input signal using the second transistor; mixing the first current and the second current with one or more local oscillator (LO) signals using the mixing stage; sensing a differential voltage between a source of the first transistor and a source of the second transistor; and adjusting a first bias voltage at a back gate of the first transistor and a second bias voltage at a back gate of the second transistor in a direction that reduces the differential voltage.

Description

FIELD Aspects of the present disclosure relate generally to wireless communications, and, more particularly, to mixers. BACKGROUND A wireless device may transmit and receive radio frequency (RF) signals in one or more wireless networks (e.g., long-term evolution (LTE) network, fifth generation (5G) network, wireless local area network (WLAN), etc.). A wireless device typically includes mixers for performing frequency up-conversion and frequency down-conversion. For example, the wireless device may include a mixer for frequency up-converting a baseband signal or an intermediate frequency (IF) signal into a radio frequency (RF) signal for transmission. SUMMARY The following presents a simplified summary of one or more implementations in order to provide a basic understanding of such implementations. This summary is not an extensive overview of all contemplated implementations and is intended to neither identify key or critical elements of all implementations nor delineate the scope of any or all implementations. Its sole purpose is to present some concepts of one or more implementations in a simplified form as a prelude to the more detailed description that is presented later. A first aspect relates to a mixer. The mixer includes a mixing stage, and a first transistor, wherein a gate of the first transistor is coupled to a first input of the mixer, and a drain of the first transistor is coupled to the mixing stage. The mixer also includes a second transistor, wherein a gate of the second transistor is coupled to a second input of the mixer, and a drain of the second transistor is coupled to the mixing stage. The mixer also includes a first source resistor coupled to a source of the first transistor, and a second source resistor coupled to a source of the second transistor. The mixer also includes an amplifier having a first input and a second input, wherein the first input of the amplifier is coupled to the source of the first transistor, the second input of the amplifier is coupled to the source of the second transistor, and the amplifier is configured to adjust at least one bias voltage of at least one of the first transistor and the second transistor based on a differential voltage between the first input of the amplifier and the second input of the amplifier. A second aspect relates to a method of operating a mixer. The mixer includes a mixing stage, a first transistor coupled to the mixing stage, and a second transistor coupled to the mixing stage. The method includes generating a first current based on a first input signal using the first transistor, generating a second current based on a second input signal using the second transistor, mixing the first current and the second current with one or more local oscillator (LO) signals using the mixing stage, sensing a differential voltage between a source of the first transistor and a source of the second transistor, and adjusting at least one bias voltage of at least one of the first transistor and the second transistor in a direction that reduces the differential voltage. BRIEF DESCRIPTION OF THE DRA WINGS FIG. 1 shows diagram of an example of an environment including a wireless device that includes a transceiver according to certain aspects of the present disclosure. FIG. 2 shows an example in which the wireless device includes a mixer and a power amplifier according to certain aspects of the present disclosure. FIG. 3 shows an example in which the wireless device also includes a low-noise amplifier according to certain aspects of the present disclosure. FIG. 4 shows an exemplary implementation of a mixer according to certain aspects of the present disclosure. FIG. 5 shows an example in which the mixer of FIG. 4 includes inductive loads according to certain aspects of the present disclosure. FIG. 6 shows an example of a mixer including source resistors and an amplifier according to certain aspects of the present disclosure. FIG. 7 shows an example of a mixer including inductive loads according to certain aspects of the present disclosure. FIG. 8 shows an example of a mixer including source capacitors according to certain aspects of the present disclosure. FIG. 9 shows an example of an amplifier including a single-ended output configured to adjust a back gate voltage of a transistor in a mixer according to certain aspects of the present disclosure. FIG. 10 shows an example of an amplifier configured to adjust gate bias voltage of transistors in a mixer according to certain aspects of the present disclosure. FIG. 11 shows an example of an amplifier including a single-ended output configured to adjust a gate bias voltage of a transistor in a mixer according to certain aspects of the present disclosure. FIG. 12 shows an example of a mixer including cascode transistors according to certain aspects of the present disclosure. FIG. 13 is a flowchart illustrating a method for operating a mixer according to certain aspects of the present disclosure. DETAILED DESCRI