US-12620981-B2 - Techniques for reduction of degradation in channels caused by bias temperature instability

Abstract

An integrated circuit includes a multiplexer circuit coupled to receive a first clock signal and a second clock signal and coupled to provide an output clock signal to a channel. A protection circuit is coupled to receive a feedback signal from the channel. The protection circuit causes the multiplexer circuit to provide oscillations in the second clock signal to the output clock signal in response to the feedback signal indicating that the channel is idle to cause the channel to be in a protection mode that reduces degradation from bias temperature instability. The protection circuit causes the multiplexer circuit to provide oscillations in the first clock signal to the output clock signal in response to the feedback signal indicating that the channel is active.

Inventors

• Han Hua Leong
• Sze Ming Chow
• David Mendel
• Jia Yong Chang
• Ryan Caldwell

Assignees

• INTEL CORPORATION

Dates

Publication Date

20260505

Application Date

20220510

Claims (20)

1. 1 . An integrated circuit comprising: a first multiplexer circuit coupled to receive a first clock signal and a second clock signal, wherein the first multiplexer circuit is coupled to provide an output clock signal to a channel; and a protection circuit coupled to receive a feedback signal from the channel, wherein the protection circuit causes the first multiplexer circuit to provide oscillations in the second clock signal to the output clock signal in response to the feedback signal indicating that the channel is idle to cause the channel to be in a first protection mode that reduces degradation from bias temperature instability, wherein the protection circuit causes the first multiplexer circuit to provide oscillations in the first clock signal to the output clock signal in response to the feedback signal indicating that the channel is active, wherein the protection circuit comprises a second multiplexer circuit coupled to the first multiplexer circuit, and wherein the second multiplexer circuit controls whether the first multiplexer circuit is in an automatic protection mode or in a manual protection mode in response to a first control signal.
2. 2 . The integrated circuit of claim 1 , wherein the protection circuit further comprises: a bias temperature instability mitigation circuit coupled to receive the feedback signal, wherein the bias temperature instability mitigation circuit asserts a second control signal in response to the feedback signal indicating that the channel is idle; and an automatic control circuit that asserts a third control signal in response to the second control signal being asserted.
3. 3 . The integrated circuit of claim 2 , wherein the second multiplexer circuit asserts a select signal in response to the third control signal being asserted and in response to the first control signal indicating the automatic protection mode, and wherein the first multiplexer circuit provides oscillations in the second clock signal to the output clock signal in response to the select signal being asserted.
4. 4 . The integrated circuit of claim 1 , wherein the integrated circuit is a configurable logic integrated circuit.
5. 5 . The integrated circuit of claim 1 , wherein the second multiplexer circuit causes the first multiplexer circuit to provide oscillations in the first clock signal or in the second clock signal to the output clock signal based on a second control signal in the manual protection mode.
6. 6 . The integrated circuit of claim 1 , wherein the protection circuit further comprises: a bias temperature instability mitigation circuit coupled to receive the feedback signal, wherein the bias temperature instability mitigation circuit generates a second control signal based on the feedback signal; and an automatic control circuit that generates a third control signal based on the second control signal, wherein the second multiplexer circuit causes the first multiplexer circuit to provide oscillations in the first clock signal or in the second clock signal to the output clock signal based on the third control signal in the automatic protection mode.
7. 7 . The integrated circuit of claim 1 , wherein the protection circuit comprises: a sideband interface circuit coupled to receive user control signals, wherein the protection circuit causes the first multiplexer circuit to provide oscillations in the first clock signal or in the second clock signal to the output clock signal based on the user control signals received at the sideband interface circuit.
8. 8 . The integrated circuit of claim 1 , wherein the protection circuit generates output signals that indicate internal engineering validation mode measurements in response to the feedback signal received from the channel.
9. 9 . The integrated circuit of claim 1 , wherein the feedback signal comprises at least one of a feedback clock signal from the channel or an activity status signal from the channel, and wherein the second clock signal has a lower frequency than a frequency of the first clock signal.
10. 10 . A method for controlling a bias temperature instability protection mode in a channel, wherein the method comprises: receiving a feedback signal from the channel at a control circuit; controlling whether a first multiplexer circuit is in an automatic protection mode or in a manual protection mode in response to a first control signal using a second multiplexer circuit; generating a select signal with the second multiplexer circuit in the control circuit based on the feedback signal indicating activity in the channel; providing oscillations in a first clock signal to an output clock signal using the first multiplexer circuit in response to the select signal indicating that the channel is active, wherein the output clock signal is provided to the channel; and providing oscillations in a second clock signal to the output clock signal using the first multiplexer circuit in response to the select signal indicating that the channel is inactive to cause the channel to be in the bias temperature instability protection mode that reduces degradation from bias temperature instability.
11. 11 . The method of claim 10 further comprising: asserting a second control signal in response to the feedback signal indicating that the channel is inactive using a bias temperature instability mitigation circuit that is coupled to receive the feedback signal; and asserting a third control signal in response to the second control signal being asserted using an automatic protection control circuit to cause the select signal to indicate that the channel is inactive.
12. 12 . The method of claim 11 further comprising: asserting the select signal to a value that indicates that the channel is inactive in response to the third control signal being asserted using the second multiplexer circuit.
13. 13 . The method of claim 10 , wherein the control circuit is in a configurable logic integrated circuit.
14. 14 . The method of claim 10 further comprising: generating a second control signal in response to the feedback signal with a bias temperature instability mitigation circuit; generating a third control signal in response to the second control signal with an automatic protection circuit; and causing the first multiplexer circuit to provide oscillations in the first clock signal or in the second clock signal to the output clock signal with the second multiplexer circuit based on the third control signal in the automatic protection mode.
15. 15 . The method of claim 10 further comprising: causing the first multiplexer circuit to provide oscillations in the first clock signal or in the second clock signal to the output clock signal based on user control signals received at a sideband interface circuit in the control circuit.
16. 16 . The method of claim 10 further comprising: generating output status signals that indicate that the channel is in the bias temperature instability protection mode in response to the feedback signal indicating that the channel is inactive using a sideband interface circuit in the control circuit.
17. 17 . A circuit system comprising: a transceiver circuit comprising a channel; a first multiplexer circuit coupled to provide an output clock signal to the transceiver circuit; and a clock protection control circuit that causes the first multiplexer circuit to provide a first clock signal as the output clock signal in response to a feedback signal from the channel indicating that the channel is inactive to cause the channel to be in a bias temperature instability protection mode that reduces degradation in the channel, wherein the clock protection control circuit causes the first multiplexer circuit to provide a second clock signal as the output clock signal in response to the feedback signal indicating that the channel is active, and wherein the clock protection control circuit comprises a second multiplexer circuit that controls whether the first multiplexer circuit is in an automatic protection mode or in a manual protection mode in response to a first control signal.
18. 18 . The circuit system of claim 17 , wherein the clock protection control circuit further comprises: a bias temperature instability mitigation circuit that generates a second control signal in response to the feedback signal, wherein the second multiplexer circuit causes the first multiplexer circuit to provide the first clock signal or the second clock signal as the output clock signal based on the first second control signal in the automatic protection mode.
19. 19 . The circuit system of claim 17 , wherein the clock protection control circuit further comprises: a sideband interface circuit, wherein the clock protection control circuit causes the first multiplexer circuit to provide the first clock signal as the output clock signal based on user control signals received at the sideband interface circuit to cause the channel to be in the bias temperature instability protection mode.
20. 20 . The circuit system of claim 17 , wherein the second multiplexer circuit causes the first multiplexer circuit to provide the first clock signal or the second clock signal as the output clock signal based on a second control signal in the manual protection mode.

Description

FIELD OF THE DISCLOSURE The present disclosure relates to electronic circuits, and more particularly, to techniques for reduction of degradation in channels caused by bias temperature instability. BACKGROUND Bias Temperature Instability (BTI) is a common degradation phenomenon that causes aging of semiconductor devices. BTI causes a performance reliability issue in semiconductor devices that commonly occurs when an application is under static conditions for an extended amount of time. BTI degradation of semiconductor devices is accelerated under stressed voltage and temperature conditions. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram illustrating an example of a Bias Temperature Instability (BTI) control circuit that reduces the effects of degradation caused by BTI in a transceiver circuit during a BTI protection mode. FIG. 2 is a flow chart that illustrates examples of operations that may be performed to implement BTI protection of the transceiver circuit of FIG. 1. FIG. 3A is a timing diagram that illustrates examples of waveforms of the internal status signals generated by the transceiver circuit of FIG. 1. FIG. 3B is another timing diagram that illustrates additional examples of waveforms of the internal status signals generated by the transceiver circuit of FIG. 1. FIG. 4 illustrates an example of a graphical user interface (GUI) generated by a user interface that receives the output signals BTS from the sideband interface and that generates the user control signals BINS shown in FIG. 1. FIG. 5 is a diagram of an illustrative programmable logic integrated circuit (IC) that may include any of the circuitry shown in FIG. 1 herein. DETAILED DESCRIPTION In some programmable logic integrated circuit systems, the effects of degradation caused by Bias Temperature Instability (BTI) can be mitigated by modifying pin assignments and using rule based configuration to turn on BTI mitigation circuitry. However, these integrated circuit systems do not have detection mechanisms to prove that BTI protection has been enabled and is operating correctly. As examples, a transceiver in an integrated circuit system may be damaged if there is a rule based configuration error in enabling BTI protection, after an active channel is reconfigured into an unused channel without triggering BTI protection, loss of signal from a link partner, or a link partner has switched to different data rates. According to some examples disclosed herein, an integrated circuit may include a protection circuit that provides Bias Temperature Instability (BTI) protection of circuits in a channel. The protection circuit can reduce the effects of BTI degradation in the channel by reducing the frequency of one or more clock signals during a BTI protection mode. The BTI protection mode is turned on when the channel is not being used (i.e., idle) and is not in a power down state. The BTI protection mode may, for example, be controlled by software that provides an alert status to a user if circuitry in the integrated circuit fails. The BTI protection mode improves circuit reliability and performance. One or more specific examples are described below. In an effort to provide a concise description of these examples, not all features of an actual implementation are described in the specification. It should be appreciated that in the development of any such actual implementation, as in any engineering or design project, numerous implementation-specific decisions must be made to achieve the developers' specific goals, such as compliance with system-related and business-related constraints, which may vary from one implementation to another. Moreover, it should be appreciated that such a development effort might be complex and time consuming, but would nevertheless be a routine undertaking of design, fabrication, and manufacture for those of ordinary skill having the benefit of this disclosure. Throughout the specification, and in the claims, the term “connected” means a direct electrical connection between the circuits that are connected, without any intermediary devices. The term “coupled” means either a direct electrical connection between circuits or an indirect electrical connection through one or more passive or active intermediary devices. The term “circuit” may mean one or more passive and/or active electrical components that are arranged to cooperate with one another to provide a desired function. FIG. 1 is a diagram illustrating an example of a Bias Temperature Instability (BTI) control circuit that reduces the effects of degradation caused by BTI in a transceiver circuit during a BTI protection mode. FIG. 1 illustrates a circuit system that includes a clock multiplexer circuit 101, a BTI clock protection control circuit 102, and a transceiver circuit 103. The BTI control circuit of FIG. 1 includes clock multiplexer circuit 101 and BTI clock protection control circuit 102. The circuit system of FIG. 1 may be provided in one or more electronic i