US-12620990-B2 - Capacitor circuit and method for controlling a capacitor circuit

US12620990B2US 12620990 B2US12620990 B2US 12620990B2US-12620990-B2

Abstract

The present document describes a capacitor circuit ( 100 ) which comprises a capacitor element ( 124 ) that is arranged between an intermediate node ( 122 ) and a reference potential ( 111 ), and a switching element ( 121 ) which comprises a first terminal that is coupled to the intermediate node ( 122 ) and a second terminal that is coupled to the reference potential ( 111 ) during the ON state of the switching element ( 121 ). Furthermore, the capacitor circuit ( 100 ) comprises a control unit ( 110, 210 ) which is configured to cause a transition from the ON state to the OFF state of the switching element ( 121 ) at a switching time instant; and, within a bias interval that is prior to the switching time instant, to transfer an electrical charge to the intermediate node ( 122 ), which is adapted to at least partially compensate an electrical charge that is transferred to the intermediated node ( 122 ) during the transition from the ON state to the OFF state of the switching element ( 121 ).

Inventors

Enno OPBROEK
Shikhar Sinha

Assignees

Renesas Design Netherlands B.V.

Dates

Publication Date: 20260505
Application Date: 20231025

Claims (15)

1 . A capacitor circuit comprising: a capacitor element that is arranged between an intermediate node and a reference potential; a switching element which comprises a first terminal that is coupled to the intermediate node and a second terminal that is coupled to the reference potential during an ON state of the switching element; wherein the switching element is configured to be switched between the ON state and an OFF state; wherein the switching element exhibits an on-resistance between the first terminal and the second terminal during the ON state and an off-resistance between the first terminal and the second terminal during the OFF state; wherein the off-resistance is higher than the on-resistance; and a control unit which is configured to: cause a transition from the ON state to the OFF state of the switching element at a switching time instant; and within a bias interval that is prior to the switching time instant, transfer an electrical charge to the intermediate node, which is adapted to at least partially compensate an electrical charge that is transferred to the intermediate node during the transition from the ON state to the OFF state of the switching element.
2 . The capacitor circuit of claim 1 , wherein the control unit is configured to: transfer a control terminal of the switching element from a drive potential to the reference potential at the switching time instant, to cause the transition from the ON state to the OFF state of the switching element; and within the bias interval prior to the switching time instant, charge the intermediate node to a voltage level that lies between the reference potential and the drive potential or that is equal to the drive potential.
3 . The capacitor circuit of claim 2 , wherein: the drive potential is higher than the reference potential; and the control unit is configured, within the bias interval prior to the switching time instant, to increase a voltage at the intermediate node to a voltage level which is: higher than the reference potential; and at or below the drive potential.
4 . The capacitor circuit of claim 1 , wherein the control unit is configured, within the bias interval prior to the switching time instant, to transfer the second terminal of the switching element from the reference potential to a drive potential.
5 . The capacitor circuit of claim 1 , wherein: the bias interval immediately precedes the switching time instant; and the transition of the switching element from the ON state to the OFF state is accomplished within a transition time, and the bias interval has a duration that is two times the transition time or less.
6 . The capacitor circuit of claim 1 , wherein the control unit is configured to transfer a control terminal of the switching element from the reference potential to a drive potential, to cause a transition from the OFF state to the ON state of the switching element.
7 . The capacitor circuit of claim 1 , wherein: the control unit comprises an inverter that is configured to generate an effective drive signal based on an inverted drive signal, such that the effective drive signal is at a drive potential when the inverted drive signal is at the reference potential; and the effective drive signal is at the reference potential when the inverted drive signal is at the drive potential; the effective drive signal is applied to a control terminal of the switching element for causing the switching element to transition from the ON state to the OFF state, or from the OFF state to the ON state; and the inverted drive signal is applied to the second terminal of the switching element.
8 . The capacitor circuit of claim 7 , wherein: the inverter exhibits a predetermined delay, such that the effective drive signal transitions from the drive potential to the reference potential at the predetermined delay after the inverted drive signal transitions from the reference potential to the drive potential; and a duration of the bias interval depends on, in particular is equal to, the predetermined delay of the inverter.
9 . The capacitor circuit of claim 7 , wherein the control unit comprises: a drive unit configured to generate a drive signal based on a digital control signal; and an inverter unit comprising: a first inverter configured to generate the inverted drive signal based on the drive signal; and the inverter that is configured to generate the effective drive signal based on the inverted drive signal.
10 . The capacitor circuit of claim 1 , wherein: the capacitor circuit comprises a further capacitor element that is arranged between a capacitor node and the intermediate node; and the control unit is configured to: set the switching element to the ON state to provide an ON-state capacitance at the capacitor node; and set the switching element to the OFF state to provide an OFF-state capacitance at the capacitor node, which is different from the ON-state capacitance.
11 . The capacitor circuit of claim 10 , wherein the capacitor circuit is configured such that: the ON-state capacitance corresponds to a capacitance of the further capacitor element; and the OFF-state capacitance corresponds to a capacitance of a serial arrangement of the further capacitor element and the capacitor element.
12 . The capacitor circuit of claim 1 , wherein the control unit is configured to: determine that a capacitance of the capacitor circuit is to be modified; and in reaction to determining that the capacitance of the capacitor circuit is to be modified, cause the switching element to transition from the ON state to the OFF state.
13 . The capacitor circuit of claim 1 , wherein: the switching element is a MOS transistor, in particular an n-type or p-type MOS transistor; the first terminal and the second terminal of the switching element correspond to a source and drain of the MOS transistor; and a control terminal of the switching element corresponds to a gate of the MOS transistor.
14 . An oscillator circuit configured to oscillate at a plurality of different frequencies, wherein the oscillator circuit comprises the capacitor circuit of claim 1 , which is configured to provide different capacitances during the ON state and the OFF state of the switching element of the capacitor circuit, to cause the oscillator circuit to oscillate at different frequencies.
15 . A method for controlling a capacitor circuit, wherein the capacitor circuit comprises: a capacitor element that is arranged between an intermediate node and a reference potential; and a switching element which comprises a first terminal that is coupled to the intermediate node and a second terminal that is coupled to the reference potential during an ON state of the switching element; wherein the switching element is configured to be switched between the ON state and an OFF state; wherein the switching element exhibits an on-resistance between the first terminal and the second terminal during the ON state and an off-resistance between the first terminal and the second terminal during the OFF state; wherein the off-resistance is higher than the on-resistance; and wherein the method comprises: determining that a capacitance of the capacitor circuit is to be modified; in reaction to the determining, transferring an electrical charge to the intermediate node, which is adapted to at least partially compensate for an electrical charge that is transferred to the intermediate node during a transition from the ON state to the OFF state of the switching element; and subsequent to transferring the electrical charge, causing a transition from the ON state to the OFF state of the switching element, to modify the capacitance of the capacitor circuit.

Description

TECHNICAL FIELD The present document relates to a capacitor circuit with a variable capacitance. Furthermore, the present document relates to a corresponding method for controlling a capacitor circuit for modifying the capacitance. BACKGROUND A transmission unit such as a Bluetooth Low Energy (BLE) transmitter typically comprises a modulation circuit which is configured to generate a modulator signal for modulating a carrier signal. The modulation circuit may be configured to adapt the frequency of the modulator signal. Adapting the frequency of the modulator signal may be achieved by adapting the resonance frequency of an LC circuit, wherein the LC circuit comprises a capacitor circuit with a variable capacitance. The present document addresses the technical problem of adapting the capacitance of a capacitor circuit in a precise and stable manner, in particular for enabling a precise and stable modulation of a carrier signal of a radio transmission unit. The technical problem is solved by the independent claims. Preferred examples are described in the dependent claims. SUMMARY According to an aspect, a capacitor circuit is described, which comprises a capacitor element that is arranged between an intermediate node and a reference potential, and a switching element which comprises a first terminal that is coupled to the intermediate node and a second terminal that is coupled to the reference potential during the ON state of the switching element. The switching element is configured to be switched between the ON state and the Off state, wherein the switching element exhibits an on-resistance between the first terminal and the second terminal during the ON state and an off-resistance between the first terminal and the second terminal during the OFF state. The capacitor circuit further comprises a control unit which is configured to cause a transition from the ON state to the OFF state of the switching element at a switching time instant. The control unit is further configured, within a bias interval that is prior to the switching time instant, to transfer an electrical charge to the intermediate node, which is adapted to at least partially or fully compensate an electrical charge that is transferred (from the switching element) to the intermediated node during the transition from the ON state to the OFF state of the switching element. According to a further aspect, a method for controlling a capacitor circuit is described. The method comprises determining that the capacitance of the capacitor circuit is to be modified. Furthermore, the method comprises, in reaction to the determining, transferring an electrical charge to the intermediate node, which is adapted to at least partially or fully compensate an electrical charge that is transferred (from the switching element) to the intermediated node during the transition from the ON state to the OFF state of the switching element. In addition, the method comprises, subsequent to transferring the electrical charge, causing the transition from the ON state to the OFF state of the switching element, to modify the capacitance of the capacitor circuit. It should be noted that the methods and systems including its preferred embodiments as outlined in the present document may be used stand-alone or in combination with the other methods and systems disclosed in this document. In addition, the features outlined in the context of a system are also applicable to a corresponding method. Furthermore, all aspects of the methods and systems outlined in the present document may be arbitrarily combined. In particular, the features of the claims may be combined with one another in an arbitrary manner. SHORT DESCRIPTION OF THE FIGURES The invention is explained below in an exemplary manner with reference to the accompanying drawings, wherein FIG. 1a illustrates an example capacitor circuit; FIG. 1b shows the ON state of the capacitor circuit of FIG. 1a; FIG. 1c shows the OFF state of the capacitor circuit of FIG. 1a; FIG. 1d illustrates the charge transfer to the intermediate node during transition from ON state to OFF state of the capacitor circuit; FIG. 1e shows the evolution of the voltage at the intermediate node of the capacitor circuit during and after the transition to the OFF state; FIG. 2a shows an example capacitor circuit with an inverter unit; FIG. 2b shows the evolution of the voltage at the intermediate node for the capacitor circuit of FIG. 2a; and FIG. 3 shows a flow chart of an example method for adapting the capacitance of a capacitor circuit. DETAILED DESCRIPTION As indicated above, the present document is directed at enabling a precise and stable switching between different capacitance values of a capacitor circuit. In this context, FIG. 1a shows an example capacitor circuit 100 which comprises a drive unit 110 for driving a switching element 121 of a capacitor unit 120. The switching element 121 may be a metaloxide semiconductor (MOS) field effect transistor (F