US-12621579-B2 - Pixel-circuit supply noise cancellation

Abstract

Systems and methods for pixel-circuit supply voltage noise cancellation are described herein. In one embodiment, a pixel circuit of an imaging sensor includes: a front-end circuit having a photodiode configured to generate electrical charges that accumulate at a floating diffusion FD0 as a photodiode voltage. The pixel circuit also includes a signal storage circuit coupled to the front-end circuit, the signal storage circuit including a common floating diffusion FDC configured to store a common floating diffusion voltage corresponding to the photodiode voltage. A unity gain circuit is coupled to the signal storage circuit. The unity gain circuit includes an operational amplifier that generates a control voltage VCTRL as an output voltage. The control voltage VCTRL includes the voltage noise component of the supply voltage PIXVDD. An output circuit is configured for outputting a signal voltage VS corresponding to the floating diffusion voltage.

Inventors

• Hacksoo Oh
• Amit Mittra

Assignees

• OMNIVISION TECHNOLOGIES, INC.

Dates

Publication Date

20260505

Application Date

20240417

Claims (20)

1. 1 . A pixel circuit of an imaging sensor, the pixel circuit comprising: a front-end circuit comprising a photodiode configured to generate electrical charges that accumulate at a floating diffusion FD 0 as a photodiode voltage, wherein the front-end circuit is configured for receiving a supply voltage PIXVDD; a signal storage circuit coupled to the front-end circuit, the signal storage circuit comprising: a common floating diffusion FDC configured to store a common floating diffusion voltage corresponding to the photodiode voltage, wherein the common floating diffusion voltage includes a voltage noise component of the supply voltage PIXVDD; a unity gain circuit coupled to the signal storage circuit, the unity gain circuit comprising an operational amplifier configured to: couple the supply voltage PIXVDD and a reference voltage VREF as an input voltage to the operational amplifier; and generate a control voltage VCTRL as an output voltage, wherein the control voltage VCTRL includes the voltage noise component of the supply voltage PIXVDD; and an output circuit coupled to the signal storage circuit, wherein the output circuit is configured for outputting a signal voltage VS corresponding to the common floating diffusion voltage.
2. 2 . The pixel circuit of claim 1 , wherein the signal storage circuit comprises: a reference voltage capacitor coupled to the control voltage VCTRL, wherein the reference voltage capacitor is configured to store a reference voltage VR; and a signal voltage capacitor coupled to the control voltage VCTRL, wherein the signal voltage capacitor is configured to store the signal voltage VS.
3. 3 . The pixel circuit of claim 2 , wherein the reference voltage VR includes the voltage noise component of the supply voltage PIXVDD.
4. 4 . The pixel circuit of claim 3 , wherein the signal voltage VS includes the voltage noise component of the supply voltage PIXVDD.
5. 5 . The pixel circuit of claim 4 , wherein, at a time of a readout of the signal voltage VS, voltage noise components of the reference voltage VR and the signal voltage VS are the same.
6. 6 . The pixel circuit of claim 2 , wherein the unity gain circuit further comprises: a first capacitor coupled to the supply voltage PIXVDD; and a second capacitor coupled to the first capacitor and to an input of the operational amplifier; wherein the operational amplifier is configured to output the control voltage VCTRL.
7. 7 . The pixel circuit of claim 6 , wherein the unity gain circuit further comprises a tenth transistor having a drain coupled to a bias voltage VREF and a source coupled to the first capacitor and the second capacitor.
8. 8 . The pixel circuit of claim 6 , wherein the front-end circuit further comprises a third transistor configured for transferring the common floating diffusion voltage to a readout circuit, and wherein: C 1/( C 1+ C 2)= Cgd _ m 3/( Cfd+Cgd _ m 3) where: C 1 is a capacitance of the first capacitor, C 2 is a capacitance of the second capacitor, Cfd is a capacitance of the floating diffusion capacitor, and Cgd_m 3 is a gate-drain capacitance of the third transistor.
9. 9 . The pixel circuit of claim 8 , wherein the photodiode voltage of the floating diffusion FD 0 is transferred to the common floating diffusion voltage of the common floating diffusion FDC as: FDC=FD0− Vgs _ m 3 where: Vgs_m 3 is a gate-to-source voltage of the third transistor.
10. 10 . The pixel circuit of claim 9 , wherein the photodiode voltage at the floating diffusion FD 0 includes a noise component: ΔFD0=(PIXVDD Supply noise)* Cgd _ m 3/( Cfd+Cgd _ m 3), where: AFD 0 represents the noise component photodiode voltage at the floating diffusion FD 0 , Cgd_m 3 is the gate-drain capacitance of the third transistor, and Cfd is the capacitance of a floating diffusion capacitor Cfd.
11. 11 . A method for operating a pixel circuit of an imaging sensor, the method comprising: generating, by a photodiode, electrical charges at a floating diffusion FD 0 of a front-end circuit as a photodiode voltage, wherein the front-end circuit is coupled to a supply voltage PIXVDD, and wherein the supply voltage PIXVDD includes a voltage noise component; transferring the photodiode voltage to a common floating diffusion FDC of a signal storage circuit that is coupled to the front-end circuit, wherein the photodiode voltage is transferred as a common floating diffusion voltage of the signal storage circuit, and wherein the common floating diffusion voltage includes the voltage noise component of the supply voltage PIXVDD; generating, by a unity gain circuit, a control voltage VCTRL as an output voltage of the unity gain circuit, wherein the control voltage VCTRL includes the voltage noise component of the supply voltage PIXVDD, and wherein the unity gain circuit is coupled to the signal storage circuit; storing, by the signal storage circuit, a reference voltage VR, wherein the reference voltage VR includes the voltage noise component of the supply voltage PIXVDD; storing, by the signal storage circuit, a signal voltage VS, wherein the signal voltage VS includes the voltage noise component of the supply voltage PIXVDD, and wherein the signal voltage VS corresponds to the common floating diffusion voltage; and outputting the signal voltage VS by an output circuit that is coupled to the signal storage circuit.
12. 12 . The method of claim 11 , further comprising: storing the reference voltage VR by a reference voltage capacitor coupled to the control voltage VCTRL; and store the signal voltage VS by a signal voltage capacitor coupled to the control voltage VCTRL.
13. 13 . The method of claim 12 , wherein the signal voltage VS includes the voltage noise component of the supply voltage PIXVDD, and wherein the signal voltage VS includes the voltage noise component of the supply voltage PIXVDD.
14. 14 . The method of claim 13 , wherein, after a reset RST signal, voltage noise components of the reference voltage VR and the signal voltage VS are different.
15. 15 . The method of claim 14 , wherein, at a time of a readout of the signal voltage VS, voltage noise components of the reference voltage VR and the signal voltage VS are the same.
16. 16 . The method of claim 12 , wherein the unity gain circuit further comprises: a first capacitor coupled to the supply voltage PIXVDD; and a second capacitor coupled to the first capacitor and to an input of an operational amplifier.
17. 17 . The method of claim 16 , wherein the front-end circuit further comprises a third transistor configured for transferring the common floating diffusion voltage to a readout circuit, and wherein: C 1/( C 1+ C 2)= Cgd _ m 3/( Cfd+Cgd _ m 3) where: C 1 is a capacitance of the first capacitor, C 2 is a capacitance of the second capacitor, Cfd is a capacitance of the floating diffusion capacitor, and Cgd_m 3 is a gate-drain capacitance of the third transistor.
18. 18 . The method of claim 17 , wherein the photodiode voltage of the floating diffusion FD 0 is transferred to the common floating diffusion voltage of the common floating diffusion FDC as: FDC=FD0− Vgs _ m 3 where: Vgs_m 3 is a gate-to-source voltage of the third transistor.
19. 19 . The method of claim 18 , wherein the photodiode voltage at the floating diffusion FD 0 includes a noise component: AFD0=(PIXVDD Supply noise)* Cgd _ m 3/( Cfd+Cgd _ m 3), where: AFD 0 represents the noise component photodiode voltage at the floating diffusion FD 0 , Cgd_m 3 is the gate-drain capacitance of the third transistor, and Cfd is the capacitance of the floating diffusion capacitor.
20. 20 . The method of claim 16 , wherein the unity gain circuit further comprises a tenth transistor having a drain coupled to a bias voltage VREF and a source coupled to the first capacitor and the second capacitor.

Description

BACKGROUND INFORMATION Field of the Disclosure This disclosure relates generally to the design of image sensors, and in particular, relates to image sensors having reduced supply voltage noise. Background Image sensors have become ubiquitous. They are widely used in digital still cameras, cellular phones, security cameras, as well as medical, automotive, and other applications. The technology for manufacturing image sensors continues to advance at a great pace. For example, the demands for higher image sensor resolution and lower power consumption motivate further miniaturization and integration of image sensors into digital devices. Image sensor operates in response to image light coming from an external scene and being incident upon the image sensor. An image sensor includes an array of pixels having photosensitive elements (e.g., photodiodes) that absorb a portion of the incident image light and, in response, the photosensitive elements generate corresponding electrical charge. The electrical charge of individual pixels can be measured as an output voltage of each photosensitive element. In general, the output voltage varies as a function of the intensity and duration of the incident light. The output voltage of individual photosensitive elements is used to produce a digital image (i.e., image data) representing an external scene. Generally, the resulting output voltages of the photosensitive elements are read out through electronic circuitry to generate image frames. However, the output voltages may be sensitive to electrical noise in the electronic circuitry. Therefore, systems and methods are needed for reduced electrical noise and improved accuracy of the readout for the image sensors. BRIEF DESCRIPTION OF THE DRAWINGS Non-limiting and non-exhaustive embodiments of the present invention are described with reference to the following figures, wherein like reference numerals refer to like parts throughout the various views unless otherwise specified. FIG. 1 illustrates an imaging system according to an embodiment of the present disclosure. FIG. 2 is a schematic illustrating pixel circuit according to an embodiment of the present disclosure. FIG. 3 is a timing diagram illustrating signals and control voltages for the pixel circuit shown in FIG. 2. FIG. 4 is a schematic illustrating pixel circuit according to an embodiment of the present disclosure. FIG. 5 is a timing diagram illustrating signals and control voltages for the pixel circuit shown in FIG. 4. Corresponding reference characters indicate corresponding components throughout the several views of the drawings. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of various embodiments of the present invention. Also, common but well-understood elements that are useful or necessary in a commercially feasible embodiment are often not depicted in order to facilitate a less obstructed view of these various embodiments of the present invention. DETAILED DESCRIPTION Image sensors, and in particular, image sensors that include color routers are disclosed. In the following description, numerous specific details are set forth to provide a thorough understanding of the embodiments. One skilled in the relevant art will recognize, however, that the techniques described herein can be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring certain aspects. Reference throughout this specification to “one example” or “one embodiment” means that a particular feature, structure, or characteristic described in connection with the example is included in at least one example of the present invention. Thus, the appearances of the phrases “in one example” or “in one embodiment” in various places throughout this specification are not necessarily all referring to the same example. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more examples. Spatially relative terms, such as “beneath”, “below”, “lower”, “under”, “above”, “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as “below” or “beneath” or “under” other elements or features would then be oriented “above” the other elements or features. Thus