US-12621928-B2 - Wiring board

US12621928B2US 12621928 B2US12621928 B2US 12621928B2US-12621928-B2

Abstract

A wiring board includes a first insulation layer comprising first and second surfaces; a second insulation layer located at an outermost layer on the first surface; a third insulation layer located at an outermost layer on the second surface; a first mounting region located on an outermost surface on the first surface; a second mounting region located on the outermost surface on the first surface and surrounding the first mounting region; a plane conductor located on the third insulation layer; and a solder resist covering the third insulation layer and the plane conductor and having an opening that exposes part of the plane conductor. In plane perspective, in a frame-shaped region between outer peripheral edges of the first and second mounting regions, the plane conductor comprises clearances at point-symmetric positions taking a center of the opening as a point of symmetry.

Inventors

Takafumi OYOSHI
Suguru KADOWAKI

Assignees

KYOCERA CORPORATION

Dates

Publication Date: 20260505
Application Date: 20221129
Priority Date: 20211130

Claims (11)

1 . A wiring board comprising: a first insulation layer comprising a first surface and a second surface located on an opposite side to the first surface; a second insulation layer located at an outermost layer among insulation layers located on a side of the first surface; a third insulation layer located at an outermost layer among insulation layers located on a side of the second surface; a first mounting region located on an outermost surface on the side of first surface; a second mounting region located on the outermost surface on the side of the first surface and surrounding the first mounting region; a plane conductor located on a surface of the third insulation layer; and a solder resist covering the surface of the third insulation layer and the plane conductor and provided with an opening that exposes part of the plane conductor, wherein, in plane perspective, in a frame-shaped region between an outer peripheral edge of the first mounting region and an outer peripheral edge of the second mounting region, the plane conductor comprises clearances at point-symmetric positions taking a center of the opening as a point of symmetry.
2 . The wiring board according to claim 1 , wherein the frame-shaped region has a quadrilateral frame shape comprising four corner portions and four side portions in plan view, the solder resist is provided with a plurality of the openings, the plane conductor comprises a plurality of the clearances respectively corresponding to the openings, the plurality of clearances comprise a first clearance located in a corner portion of the corner portions of the quadrilateral frame shape and a second clearance located in a region other than the corner portions of the quadrilateral frame shape, the first clearance is located and aligned along a diagonal line connecting the corner portions, and the second clearance is located and aligned in a direction perpendicular to a side portion of the side portions close to the second clearance.
3 . The wiring board according to claim 1 , wherein in plane perspective, at least part of the plurality of openings has a circular shape, and at the opening having a circular shape, the clearances each have an arc shape along an edge of the opening.
4 . The wiring board according to claim 1 , wherein part of the solder resist is located in a clearance of the clearances.
5 . The wiring board according to claim 1 , wherein the clearances are separated from an edge of the opening, in plane perspective.
6 . The wiring board according to claim 1 , wherein an angle formed between imaginary lines respectively connecting the center of the opening and two end portions of a clearance of the clearances is at least 90° in plane perspective.
7 . The wiring board according to claim 1 , wherein the clearances each have a length of at least 50 μm in a direction orthogonal to the edge of the opening.
8 . The wiring board according to claim 1 , wherein, in the frame-shaped region, the opening located in an internal region between the outer peripheral edge of the first mounting region and an inner peripheral edge of the second mounting region is an elongated opening having at least one of a rectangular shape and an elliptical shape.
9 . The wiring board according to claim 8 , wherein the internal region has a quadrilateral frame shape comprising four corner portions and four side portions, the elongated opening comprises a first elongated opening located in a corner portion of the corner portions of the internal region and a second elongated opening located in a portion other than the corner portions of the internal region, a minor axis direction of the first elongated opening corresponds to a direction along a diagonal line connecting the corner portions of the internal region, and a minor axis direction of the second elongated opening corresponds to a direction perpendicular to a side portion of the side portions of the internal region close to the second elongated opening.
10 . The wiring board according to claim 8 , wherein when the elongated opening has a rectangular shape, the elongated opening has an aspect ratio of 3.15 or more and 5 or less of a long side to 1 of a short side, and when the elongated opening has an elliptical shape, the elongated opening has a flattening ratio of 0.1 or more and 0.5 or less.
11 . The wiring board according to claim 8 , wherein an opening area of the elongated opening is substantially equal to an opening area of an opening other than the elongated opening.

Description

TECHNICAL FIELD The present invention relates to a wiring board. BACKGROUND OF INVENTION A flip chip ball grid array (FC-BGA) and the like are known as an LSI package in which an LSI chip is mounted on a wiring board. A wiring board used in such an LSI package is provided with a stiffener for reinforcement as described in Patent Document 1, for example. CITATION LIST Patent Literature Patent Document 1: JP 3173459 B SUMMARY Solution to Problem A wiring board according to the present disclosure includes: a first insulation layer including a first surface and a second surface located on an opposite side to the first surface; a second insulation layer located at an outermost layer among insulation layers located on a side of the first surface; a third insulation layer located at an outermost layer among insulation layers located on a side of the second surface; a first mounting region located on an outermost surface on the side of first surface; a second mounting region located on the outermost surface on the side of the first surface and surrounding the first mounting region; a plane conductor located on a surface of the third insulation layer; and a solder resist covering the surface of the third insulation layer and the plane conductor and provided with an opening that exposes part of the plane conductor. In plane perspective, in a frame-shaped region between an outer peripheral edge of the first mounting region and an outer peripheral edge of the second mounting region, the plane conductor includes clearances at point-symmetric positions taking a center of the opening as a point of symmetry. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an explanatory diagram describing a state in which a chip and a stiffener are mounted on a wiring board according to an embodiment of the present disclosure. FIG. 2 is an explanatory diagram describing a state in which the wiring board according to the embodiment of the present disclosure is viewed from a direction of an arrow A depicted in FIG. 1. FIG. 3 is an explanatory diagram describing a state in which the wiring board according to the embodiment of the present disclosure is viewed from a direction of an arrow B depicted in FIG. 1. FIG. 4 is an explanatory diagram describing an example of a plane conductor included in the wiring board according to the embodiment of the present disclosure. FIG. 5 is an explanatory diagram illustrating a variation of an opening formed in a solder resist. FIG. 6 is an explanatory diagram describing a clearance. FIGS. 7A-7C are diagrams depicting stress simulation results. FIG. 8 is a graph depicting stress values generated in openings in accordance with the simulation results depicted in FIG. 7. FIG. 9 is an explanatory diagram describing a variation of a clearance. DESCRIPTION OF EMBODIMENTS In a wiring board of related art, a warp is likely to occur in the wiring board due to a difference in thermal expansion coefficients between a substrate, chip, and stiffener. In particular, stress is likely to be concentrated in a region between the chip and the stiffener due to the warp, and cracks are likely to occur in a plane conductor (particularly, the plane conductor around solder) present on a surface (opposite surface) facing the region mentioned above. Because of this, a wiring board in which cracks are unlikely to occur even when the wiring board is repeatedly used in high and low temperature environments is required. In the wiring board according to the present disclosure, as described above, the plane conductor includes clearances at point-symmetric positions taking the center of the opening as a point of symmetry in the frame-shaped region between the outer peripheral edge of the first mounting region and the outer peripheral edge of the second mounting region in plane perspective. Because of this, cracks are unlikely to occur in the wiring board according to the present disclosure even when the wiring board is repeatedly used in high and low temperature environments. A wiring board according to an embodiment of the present disclosure will be described with reference to FIGS. 1 to 6. FIG. 1 is an explanatory diagram describing a state in which a chip and a stiffener are mounted on a wiring board according to the embodiment of the present disclosure. As illustrated in FIG. 1, a wiring board 1 according to the embodiment includes a first insulation layer 21, a second insulation layer 22, a third insulation layer 23, an electrical conductor layer 4, and a solder resist 5. The first insulation layer 21 has a first surface 211 and a second surface 212 located on the opposite side to the first surface 211. The first surface 211 and the second surface 212 each correspond to a principal surface of the first insulation layer 21. In the wiring board 1 according to the embodiment, the first insulation layer 21 corresponds to a core insulation layer. The first insulation layer 21 is not particularly limited as long as it is made of a material havin