US-12622068-B2 - Solar cell and preparation method therefor

US12622068B2US 12622068 B2US12622068 B2US 12622068B2US-12622068-B2

Abstract

In a solar cell, the back surface of a substrate thereof is provided with alternately distributed emitter zones and back surface field zones. An emitter is formed in each emitter zone, and the emitters are made of boron-doped monocrystalline silicon. A back surface field is formed in each back surface field zone; the back surface fields comprise tunneling oxide layers and polycrystalline silicon layers in stacked distribution, the polycrystalline silicon layers being made of phosphorus-doped polycrystalline silicon, and the tunneling oxide layers being located between a polycrystalline silicon layer and a polycrystalline silicon layer. Positive electrodes are electrically connected to the emitters, and negative electrodes are electrically connected to the back surface fields. In the described solar cell, the light-receiving area of the front surface can be expanded and the recombination rate of electron-hole pairs can be reduced, thereby effectively improving the photoelectric conversion efficiency of the solar cell.

Inventors

Mingzhang DENG
Wenzhou XU
Yu He
Hao Chen
Fan Zhou
Xiajie Meng
Pengyu ZHOU
Qian Yao
Guoqiang Xing

Assignees

TONGWEI SOLAR (MEISHAN) CO., LTD.

Dates

Publication Date: 20260505
Application Date: 20220530
Priority Date: 20211027

Claims (18)

1 . A method of preparing a solar cell, comprising: conducting a boron diffusion on a substrate to form a boron diffusion layer on a surface of the substrate and a borosilicate glass on a surface of the boron diffusion layer; using a first surface of the substrate as a back of the substrate, and sequentially conducting laser slotting and boron diffusion layer etching on partial area of the borosilicate glass on the back of the substrate to form back surface field regions, areas without being slotted and etched being emitter regions, and the emitter regions and the back surface field regions being configured to alternate on the back of the substrate; growing a tunnel oxide layer on the back of the substrate, followed by depositing an intrinsic amorphous silicon layer; conducting a phosphorus diffusion on the substrate, so as to cause the intrinsic amorphous silicon layer to form a polysilicon layer made of phosphorus doped polysilicon and create a phosphosilicate glass on the surface of the polysilicon layer; printing a corrosion resistant slurry being soluble in alkali but insoluble in acid on a surface of the phosphosilicate glass corresponding to the back surface field regions and drying the corrosion resistant slurry to form an alkali-soluble but acid-insoluble layer; removing the phosphosilicate glass corresponding to the emitter regions with acid; removing the alkali-soluble but acid-insoluble layer and the polysilicon layer and the tunnel oxide layer corresponding to the emitter regions with alkali; removing the remaining phosphorosilicate glass and borosilicate glass on the back of the substrate with acid; using the remaining boron diffusion layer in the emitter regions as emitters, and using the remaining tunnel oxide layer and polysilicon layer in the back surface field regions as back surface fields; and electrically connecting a positive electrode to the emitter and electrically connecting a negative electrode to the back surface field.
2 . The method according to claim 1 , wherein the removing the alkali-soluble but acid-insoluble layer and the polysilicon layer and the tunnel oxide layer corresponding to the emitter regions with alkali comprises: removing the alkali-soluble but acid-insoluble layer with a first alkali liquor, followed by removing the polysilicon layer and the tunnel oxide layer corresponding to the emitter regions with a second alkali liquor; wherein an alkalinity of the first alkali liquor is less than the alkalinity of the second alkali liquor.
3 . The method according to claim 1 , wherein the electrically connecting a positive electrode to the emitter and electrically connecting a negative electrode to the back surface field comprises: providing emitter contact holes in the emitters, and printing positive electrodes at regions corresponding to the emitter contact holes; and providing back surface field contact holes in the back surface fields, and printing negative electrodes at regions corresponding to the back surface field contact holes.
4 . The method according to claim 1 , further comprising using a second surface of the substrate as a front surface of the substrate and providing an anti-reflection structure on the surface of the substrate, the using a second surface of the substrate as a front surface of the substrate and providing an anti-reflection structure on the surface of the substrate including: after the step of removing the alkali-soluble but acid-insoluble layer and the polysilicon layer and the tunnel oxide layer corresponding to the emitter regions with alkali, and before the step of removing the remaining phosphosilicate glass and borosilicate glass on the back of the substrate with acid, removing the phosphosilicate glass and the borosilicate glass on the front surface of the substrate with acid, and then texturing the front surface of the substrate to form the anti-reflection textured structure.
5 . The method according to claim 3 , further comprising: distributing the emitter regions and the back surface field regions side by side along a first predetermined direction; in the first predetermined direction, each of the back surface field regions has a dimension of 100 to 300 μm, and a spacing between two adjacent back surface field regions is from 600 μm to 1500 μm.
6 . The method according to claim 5 , wherein in the first predetermined direction, the positive electrode has a dimension of 50 to 200 μm, and the negative electrode has a dimension of 40 to 100 μm.
7 . The method according to claim 3 , wherein the positive electrode is electrically connected to an inner wall of the emitter contact hole provided in the emitter and the negative electrode is electrically connected to an inner wall of the back surface field contact hole provided in the back surface field; the emitter contact hole and the back surface field contact hole each having a diameter of 25 to 50 μm.
8 . The method according to claim 5 , wherein in the first predetermined direction, a spacing between centers of two adjacent emitter contact holes in each emitter is 20 to 80 μm, and a spacing between centers of two adjacent back surface field contact holes in each back surface is 20 to 80 μm.
9 . The method according to claim 5 , wherein each of the emitter regions and the back surface field regions extends along a second predetermined direction, the second predetermined direction being perpendicular to the first predetermined direction; in the second predetermined direction, a spacing between centers of two adjacent emitter contact holes in each emitter is 50 to 100 μm apart, and a spacing between centers of two adjacent back surface field contact holes in each back surface is 20 to 80 μm.
10 . The method according to claim 3 , further comprising: alternatively arranging the emitters and the back surface fields, so that the emitter contact holes and the back surface field contact holes are alternated arranged.
11 . The method according to claim 3 , wherein in each emitter region, the emitter contact holes are provided in at least one row, wherein a plurality of emitter contact holes in each row of emitter contact holes are spaced along a second predetermined direction, and multiple rows of emitter contact holes are spaced along a first predetermined direction; in each back surface field region, the back surface field contact holes are provided in at least one row, wherein a plurality of back surface field contact holes in each row of back surface field contact holes are spaced along a second predetermined direction, and multiple rows of back surface field contact holes are spaced along a first predetermined direction.
12 . The method according to claim 1 , wherein the tunnel oxide layer is a silicon dioxide film and has a thickness of 1 to 5 nm.
13 . The method according to claim 1 , wherein the polysilicon layer has a thickness of 100 to 500 nm.
14 . The method according to claim 4 , further comprising: providing a silicon nitride anti-reflection layer on a surface of the anti-reflection textured structure of the front surface of the substrate; providing an aluminum oxide passivation layer on surfaces of the emitters and the back surface fields; and providing a silicon nitride passivation layer on a surface of the aluminum oxide passivation layer; wherein, the positive electrode is electrically connected to the emitter after penetrating the silicon nitride passivation layer and the aluminum oxide passivation layer, and the negative electrode is electrically connected to the back surface field after penetrating the silicon nitride passivation layer and the aluminum oxide passivation layer.
15 . The method according to claim 14 , wherein the silicon nitride anti-reflection layer has a thickness of 80 to 120 nm; the aluminum oxide passivation layer has a thickness of 3 to 20 nm; the silicon nitride passivation layer has a thickness of 75 to 150 nm.
16 . The method according to claim 14 , further comprising: further forming a front surface field on a surface of the anti-reflection textured structure by shallow phosphorus diffusion, the front surface field being located between the anti-reflection textured structure and the silicon nitride anti-reflection layer.
17 . The method according to claim 1 , further comprising: providing a positive electrode bus bar and a negative electrode bus bar spaced arranged; wherein, the positive electrode bus bar is electrically connected to each positive electrode and the negative electrode bus bar is electrically connected to each negative electrode; the positive electrode bus bar is spaced from the negative electrode with insulating adhesive and the negative electrode bus bar is spaced from the positive electrode with insulating adhesive.
18 . The method according to claim 17 , wherein the positive electrode and the negative electrode both extend in a third predetermined direction, the positive electrode bus bar and the negative electrode bus bar extending in a direction perpendicular to the direction along which the positive electrode extends, and the negative electrode bus bar extending in a direction perpendicular to the direction along which the negative electrode extends.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application is the national phase under U.S.C. § 371 of PCT International Application No. PCT/CN2022/096065, which has an international filing date of May 30, 2022 and claims priority of Chinese patent application No. 202111256035.8, entitled “Solar cell and preparation method therefor” and filed before the China National Intellectual Property Administration on Oct. 27, 2021. The entireties of both applications are incorporated by reference herein for all purposes. TECHNICAL FIELD The present application relates to the field of photovoltaic technology, and specifically to a solar cell and a preparation method thereof. BACKGROUND The frontal light receiving area of a solar cell is an important factor affecting its photoelectric conversion efficiency. However, there is a grid line structure covered on a front side of a conventional solar cell, that causes a loss of current and therefore leads to a decreasing of the photoelectric conversion efficiency. In addition, for a crystalline silicon solar cell, the photoelectric conversion efficiency of the solar cell is determined by the recombination of electron-hole pairs inside the cell; however, for a diffusion layer formed by conventional diffusion, there are problems such as large recombination rate of electron-hole pairs, which has been one of important factors limiting the solar cell efficiency. SUMMARY The present application provides a solar cell and the preparation method thereof, which can increase the frontal light receiving area and decrease the recombination rate of electron-hole pairs, thus can effectively improve the photoelectric conversion efficiency of the solar cell. Embodiments of the present application are implemented in such a way that: Some embodiments of the present application provide a solar cell with a substrate having alternating emitter regions and back surface field regions on the back of the substrate. Emitters are formed in the emitter regions, and the emitters are made of boron doped monocrystalline silicon. Back surface fields are formed in the back surface field regions. The back surface field includes a tunnel oxide layer and a polysilicon layer laminated arranged. The polysilicon layer is made of phosphorus doped polysilicon, and the tunnel oxide layer is located between the polysilicon layer and the polysilicon layer. A positive electrode of the solar cell is electrically connected to the emitter and a negative electrode of the solar cell is electrically connected to the back surface field. In the above technical solution, the emitter connected to the positive electrode is disposed at the back of the substrate, so that there is no positive electrode and corresponding grid line structure on the front side of the substrate, which can increase the light receiving area on the front side and reduce the current loss caused by shading on the front side of the substrate, thus increasing the photoelectric conversion efficiency of the solar cell. A tunnel oxide layer and a polysilicon layer made of phosphorus doped polysilicon are provided on the back side of the substrate to act as a back surface field. The tunneling effect of the tunnel oxide layer allows electrons to pass through but not holes, and the phosphorus doped polysilicon forms a passivated contact, thus reducing the recombination rate of electron-hole pairs. In some optional embodiments, the emitter region and the back surface field region may be distributed side by side along a first predetermined direction. In the first predetermined direction, each back surface field region may have a dimension of 100 to 300 μm and the spacing between two adjacent back surface field regions may be 600 to 1500 μm. In the above technical solution, the emitter region and the back surface field region have suitable dimension and spacing, which enables the solar cell to have a suitable grid line density and facilitates the printing operation in the preparation process; while ensuring metal contact, it can also effectively achieve the purpose of reducing the emitter recombination, increasing the open circuit voltage of the cell and improving the photoelectric conversion efficiency of the cell. In some optional embodiments, the positive electrode may have a dimension of 50 to 200 μm and the negative electrode may have a dimension of 40 to 100 μm in the first predetermined direction. Optionally, the positive electrode may be electrically connected to the inner wall of a emitter contact hole provided in the emitter, and the negative electrode may be electrically connected to the inner wall of a back surface field contact hole provided in the back surface field; each of the emitter contact hole and the back surface field contact hole may have a diameter of 25 to 50 μm. Optionally, in the first predetermined direction, the spacing between centers of two adjacent emitter contact holes in each emitter may be of 20 to 80 μm, and spacing between centers of tw