US-12622073-B2 - Hybrid image sensor having dies bonded to pixel substrate

US12622073B2US 12622073 B2US12622073 B2US 12622073B2US-12622073-B2

Abstract

An image sensor structure and a method of fabricating the structure are disclosed, in image sensor structure, at least one die is bonded to pixel substrate by bonding first bonding layer to second bonding layer, and the die includes signal processing circuit and/or storage device for photosensitive elements in pixel substrate. The die is bonded to the pixel substrate so that the signal processing circuit and/or storage device is/are coupled to photosensitive elements in pixel substrate. In this way, signal processing and/or storage functions of the image sensor can be provided without additional occupation of the area of the pixel substrate, allowing for more photosensitive elements to be arranged on the pixel substrate with the same area and thus resulting in a larger photosensitive area. Moreover, less wiring is needed on the 2D plane of the pixel substrate, helping in reducing interference with signals and delays and improving imaging quality.

Inventors

Guoliang YE
SHENGJIN SONG
Sheng Hu
Ying Wang

Assignees

WUHAN XINXIN SEMICONDUCTOR MANUFACTURING CO., LTD.

Dates

Publication Date: 20260505
Application Date: 20221223
Priority Date: 20221025

Claims (7)

1 . A method of fabricating an image sensor structure, comprising: providing a pixel substrate having opposing first and second surfaces and a plurality of photosensitive elements between the first and second surfaces and successively forming, on the first surface, a first interconnect structure and a first bonding layer connected to the first interconnect structure, the first bonding layer comprising first metal bond pads; forming at least one die comprising a signal processing circuit and/or a storage device for the photosensitive elements, a second interconnect structure and a second bonding layer connected to the second interconnect structure, the second bonding layer comprising second metal bond pads; bonding the at least one die to the pixel substrate by bonding the first bonding layer to the second bonding layer, wherein the first metal bond pads are electrically connected to the second metal bond pads, the bonding of the first bonding layer to the second bonding layer is accomplished by hybrid bonding; forming a filling layer on a region of the first bonding layer not covered by the die, wherein the formation of the filling layer comprises: depositing a dielectric material over the pixel substrate on the region of the first bonding layer not covered by the die so that a top surface of the dielectric material is higher than a top surface of the die; and performing a planarization process on the top surface of the dielectric material so that the top surface of the die is exposed; after bonding the at least one die to the pixel substrate, forming metal pads on the second surface of the pixel substrate, the metal pads being connected to the first interconnect structure through through-silicon vias penetrating the pixel substrate; and after forming the metal pads, forming a metal grid on the second surface.
2 . The method according to claim 1 , wherein before the metal grid is formed, the pixel substrate is thinned from the second surface, and wherein before the pixel substrate is thinned, the filling layer is formed on the region of the first bonding layer not covered by the die, and a carrier substrate is bonded to the die and the filling layer.
3 . The method according to claim 1 , wherein the die comprises a semiconductor substrate that has undergone a dicing process, and wherein before the semiconductor substrate is subjected to the dicing process, the semiconductor substrate is thinned from a side away from the second bonding layer.
4 . The method according to claim 1 , wherein after the at least one die is bonded to the pixel substrate, an orthographic projection of at least some of the die on the first surface at least partially overlap an orthographic projection of a photosensitive area on the first surface, the photosensitive area adapted for arrangement of the photosensitive elements therein.
5 . The method according to claim 4 , wherein the orthographic projection of the die on the first surface is entirely encompassed by the orthographic projection of the photosensitive area on the first surface.
6 . The method according to claim 1 , wherein the formation of the metal grid comprises: successively stacking a bottom dielectric layer, a metal layer and a mask layer over the second surface of the pixel substrate; and patterning the stacked bottom dielectric layer, the metal layer and the mask layer to form openings in alignment with the respective photosensitive elements, in which the second surface of the pixel substrate is exposed, and the metal grid surrounding the openings.
7 . The method according to claim 1 , wherein among the at least one die bonded to the pixel substrate, at least one of the dies is a logic circuit unit comprising the signal processing circuit, and at least another one of the dies is a storage unit comprising the storage device, and wherein the logic circuit unit and the storage unit are interconnected by the first interconnect structure.

Description

CROSS-REFERENCES TO RELATED APPLICATION This application claims the priority of Chinese patent application number 202211313535.5, filed on Oct. 25, 2022, the entire contents of which are incorporated herein by reference. TECHNICAL FIELD The present invention relates to the field of semiconductor technology and, in particular, to an image sensor structure and method of fabricating the structure. BACKGROUND Image sensors are core components of imaging devices, which take images by converting optical signals into electronic signals. For example, CMOS image sensors (CIS) had been widely used in various fields thanks to their advantages of low power consumption and high signal-to-noise ratio. Traditional image sensors adopt two-dimensional (2D) architectures in which a photosensitive area and a logic circuit area are arranged in the 2D plane, making a rather large fraction of the chip area non-photosensitive. Since only a limited number of pixels can be arranged in the photosensitive area, imaging quality is suboptimal. Moreover, since the pixels in the photosensitive area and processing circuits in the logic circuit area are interconnected by traces in the 2D plane, interference with signals and delays tend to occur due to, among others, a complex wiring design, an excessively long wiring length and wiring layout limitations. SUMMARY OF THE INVENTION In order to overcome the above-described shortcomings of image sensors that employ 2D architectures, the present invention provides an image sensor structure and a method of fabricating the structure. In one aspect, the present invention provides a method of fabricating an image sensor structure, including: providing a pixel substrate having opposing first and second surfaces and a plurality of photosensitive elements between the first and second surfaces and successively forming, on the first surface, a first interconnect structure and a first bonding layer connected to the first interconnect structure, the first bonding layer including first metal bond pads;forming at least one die including a signal processing circuit and/or a storage device for the photosensitive elements, a second interconnect structure and a second bonding layer connected to the second interconnect structure, the second bonding layer including second metal bond pads;bonding the at least one die to the pixel substrate by bonding the first bonding layer to the second bonding layer, wherein the first metal bond pads are electrically connected to the second metal bond pads; andforming a metal grid on the second surface. Optionally, after the at least one die is bonded to the pixel substrate, metal pads connected to the first interconnect structure may be formed on the second surface of the pixel substrate. Optionally, before the metal grid is formed, the pixel substrate may be thinned from the second surface, wherein before the pixel substrate is thinned, a filling layer is formed on a region of the first bonding layer not covered by the die, and a carrier substrate is bonded to the die and the filling layer. Optionally, the formation of the filling layer may include: depositing a dielectric material over the pixel substrate on the region of the first bonding layer not covered by the die so that a top surface of the dielectric material is higher than a top surface of the die; andperforming a planarization process on the top surface of the dielectric material so that the top surface of the die is exposed. Optionally, the die may include a semiconductor substrate that has undergone a dicing process, wherein before the semiconductor substrate is subjected to the dicing process, it is thinned from the side away from the second bonding layer. Optionally, the at least one die may be bonded to the pixel substrate so that orthographic projections of at least some of the at least one die on the first surface at least partially overlap an orthographic projection of a photosensitive area on the first surface, wherein the photosensitive area is adapted for arrangement of the photosensitive elements therein. Optionally, the bonding of the first bonding layer to the second bonding layer may be accomplished by hybrid bonding. In another aspect, the present invention provides an image sensor structure including: a pixel substrate having opposing first and second surfaces and a plurality of photosensitive elements between the first and second surfaces, the second surface formed thereon with a metal grid;a first interconnect structure and a first bonding layer connected to the first interconnect structure, which are successively formed on the first surface, the first bonding layer including first metal bond pads; andat least one die including a signal processing circuit and/or a storage device for the photosensitive elements, a second interconnect structure and a second bonding layer connected to the second interconnect structure, the second bonding layer including second metal bond pads, wherein the at least one