US-12622136-B2 - Display panels with oxide transistor connected to silicon transistor

US12622136B2US 12622136 B2US12622136 B2US 12622136B2US-12622136-B2

Abstract

A display panel includes a silicon substrate and an oxide transistor layer disposed on a side of the silicon substrate. The silicon substrate includes a single-crystal silicon transistor, and the oxide transistor layer includes an oxide transistor electrically connected to the single-crystal silicon transistor.

Inventors

Mian Zeng

Assignees

WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.

Dates

Publication Date: 20260505
Application Date: 20230614
Priority Date: 20230329

Claims (20)

1 . A display panel, comprising: a silicon substrate comprising a single-crystal silicon transistor; and an oxide transistor layer disposed on a side of the silicon substrate and comprising an oxide transistor; wherein the silicon substrate comprises a first passivation layer and a first tungsten plug, the first tungsten plug is disposed within the first passivation layer and passes through the first passivation layer, and a drain of the oxide transistor is electrically connected to the single-crystal silicon transistor through the first tungsten plug.
2 . The display panel of claim 1 , wherein the oxide transistor layer comprises a second passivation layer, a first lap-joint electrode, and a first signal line disposed close to a side of the silicon substrate, the first signal line and the first lap-joint electrode are disposed in a same layer and spaced apart, the first lap-joint electrode covers the first tungsten plug, and the second passivation layer covers the first lap-joint electrode and the first signal line; and wherein the first signal line is electrically connected to a source of the oxide transistor, and the first lap-joint electrode is electrically connected between the drain of the oxide transistor and the first tungsten plug.
3 . The display panel of claim 2 , wherein the display panel further comprises a light-emitting functional layer disposed on a side of the oxide transistor layer away from the silicon substrate; wherein the light-emitting functional layer comprises an anode disposed close to the side of the oxide transistor layer, a cathode disposed away from the side of the oxide transistor layer, and an organic light-emitting layer disposed between the anode and the cathode; and wherein the oxide transistor layer further comprises a second tungsten plug and a third passivation layer disposed on a side of the drain away from the silicon substrate, a surface of the second tungsten plug away from the silicon substrate is flush with a surface of the third passivation layer away from the silicon substrate; the anode covers the second tungsten plug, and the second tungsten plug is electrically connected to the anode and the drain.
4 . The display panel of claim 3 , wherein the display panel further comprises an encapsulation layer disposed on the light-emitting functional layer, and covering and packaging the light-emitting functional layer, the oxide transistor layer, and the silicon substrate; and wherein the encapsulation layer comprises a first inorganic layer, a second inorganic layer, and an organic layer disposed between the first inorganic layer and the second inorganic layer.
5 . The display panel of claim 1 , wherein the silicon substrate further comprises a first connection element, the first connection element and the first tungsten plug are disposed in a same layer and spaced apart, and the first connection element passes through the first passivation layer; wherein the oxide transistor layer comprises a second passivation layer, a first lap-joint electrode, and a second lap-joint electrode disposed close to a side of the silicon substrate, the second lap-joint electrode and the first lap-joint electrode are disposed in a same layer and spaced apart, the first lap-joint electrode covers the first tungsten plug, the second lap-joint electrode covers the first connection element, and the second passivation layer covers the first lap-joint electrode and the second lap-joint electrode; and wherein the first connection element is electrically connected to a second signal line in the silicon substrate, and electrically connected to a source of the oxide transistor through the second lap-joint electrode.
6 . The display panel of claim 1 , wherein the silicon substrate further comprises a first connection element, the first connection element and the first tungsten plug are disposed in a same layer and spaced apart, and the first connection element passes through the first passivation layer; wherein the oxide transistor layer comprises a second passivation layer, a first lap-joint electrode, and a second lap-joint electrode disposed close to a side of the silicon substrate, the second lap-joint electrode and the first lap-joint electrode are disposed in a same layer and spaced apart, the first lap-joint electrode covers the first tungsten plug, the second lap-joint electrode covers the first connection element, and the second passivation layer covers the first lap-joint electrode and the second lap-joint electrode; and wherein the silicon substrate comprises two single-crystal silicon transistors, the first tungsten plug is electrically connected to one of the two single-crystal silicon transistors, the first lap-joint electrode is electrically connected between the drain of the oxide transistor and the first tungsten plug, the first connection element is electrically connected to another of the two single-crystal silicon transistors, and the second lap-joint electrode is electrically connected between a source of the oxide transistor and the first connection element.
7 . The display panel of claim 1 , wherein the silicon substrate further comprises a second connection element, the second connection element and the first tungsten plug are disposed in a same layer and spaced apart, and pass through the first passivation layer; wherein the oxide transistor layer comprises a second passivation layer, a first lap-joint electrode, and a third lap-joint electrode disposed close to a side of the silicon substrate, the third lap-joint electrode and the first lap-joint electrode are disposed in a same layer and spaced apart, the first lap-joint electrode covers the first tungsten plug, the third lap-joint electrode covers the second connection element, and the second passivation layer covers the first lap-joint electrode and the third lap-joint electrode; and wherein the silicon substrate comprises two single-crystal silicon transistors, the first signal line is electrically connected to a source of the oxide transistor, the first lap-joint electrode is electrically connected to a drain of the oxide transistor, and electrically connected to one of the two single-crystal silicon transistors through the first tungsten plug, and the third lap-joint electrode is electrically connected to another of the two single-crystal silicon transistors through the second connection element.
8 . The display panel of claim 7 , wherein the display panel further comprises a light-emitting functional layer disposed on a side of the oxide transistor layer away from the silicon substrate; wherein the light-emitting functional layer comprises an anode disposed close to the side of the oxide transistor layer, a cathode disposed away from the side of the oxide transistor layer, and an organic light-emitting layer disposed between the anode and the cathode; and wherein the oxide transistor layer further comprises a transition electrode disposed on a side of the third lap-joint electrode away from the silicon substrate, and a second tungsten plug and a third passivation layer disposed on a side of the transition electrode away from the third lap-joint electrode; a surface of the second tungsten plug away from the silicon substrate is flush with a surface of the third passivation layer away from the silicon substrate, and the third lap-joint electrode, the transition electrode, the second tungsten plug, and the anode are electrically connected in sequence.
9 . The display panel of claim 8 , wherein the display panel further comprises an encapsulation layer disposed on the light-emitting functional layer, and covering and packaging the light-emitting functional layer, the oxide transistor layer, and the silicon substrate; and wherein the encapsulation layer comprises a first inorganic layer, a second inorganic layer, and an organic layer disposed between the first inorganic layer and the second inorganic layer.
10 . The display panel of claim 1 , wherein the silicon substrate further comprises a first connection element and a second connection element, and the first connection element, the second connection element, and the first tungsten plug are disposed in a same layer and spaced apart, and pass through the first passivation layer; wherein the oxide transistor layer comprises a second passivation layer, a first lap-joint electrode, a second lap-joint electrode, and a third lap-joint electrode disposed close to a side of the silicon substrate, the third lap-joint electrode, the second lap-joint electrode, and the first lap-joint electrode are disposed in a same layer and spaced apart, the first lap-joint electrode covers the first tungsten plug, the second lap-joint electrode covers the first connection element, the third lap-joint electrode covers the second connection element, and the second passivation layer covers the first lap-joint electrode, the second lap-joint electrode, and the third lap-joint electrode; and wherein the silicon substrate comprises two single-crystal silicon transistors, the first tungsten plug is electrically connected to one of the two single-crystal silicon transistors, and electrically connected to the drain of the oxide transistor through the first lap-joint electrode, the first connection element is electrically connected to a second signal line in the silicon substrate, and electrically connected to a source of the oxide transistor through the second lap-joint electrode, and the third lap-joint electrode is electrically connected to another of the two single-crystal silicon transistors through the second connection element.
11 . The display panel of claim 1 , wherein a surface of the first tungsten plug close to the oxide transistor layer is flush with a surface of the first passivation layer close to the oxide transistor layer.
12 . The display panel of claim 1 , wherein the display panel comprises a driving circuit comprising the single-crystal silicon transistor and the oxide transistor; and wherein the driving circuit is selected from one or more of a pixel driving circuit, a gate driving circuit, and a source driving circuit.
13 . The display panel of claim 12 , wherein a driving transistor of the pixel driving circuit is the single-crystal silicon transistor, and at least one of transistors in the pixel driving circuit, other than the driving transistor, is the oxide transistor.
14 . The display panel of claim 12 , wherein a driving transistor of the pixel driving circuit is the oxide transistor, and at least one of transistors in the pixel driving circuit, other than the driving transistor, is the single-crystal silicon transistor.
15 . The display panel of claim 1 , wherein the oxide transistor comprises one or more of a thin film transistor with a top gate structure or a thin film transistor with a bottom gate structure.
16 . The display panel of claim 1 , wherein the single-crystal silicon transistor is a driving transistor, and the oxide transistor is a reset transistor.
17 . The display panel of claim 1 , further comprising a pixel driving circuit, wherein the pixel driving circuit is constituted by the single-crystal silicon transistor, the oxide transistor, a driving control transistor, a reset transistor, a first capacitor, and a second capacitor, and both the single-crystal silicon transistor and the oxide transistor are electrically connected to an anode of a light-emitting device in the display panel.
18 . The display panel of claim 1 , wherein the silicon substrate comprises a single-crystal silicon active layer, a first source drain layer, a first insulation layer, a first gate layer, a connection layer, a second insulation layer, a third insulation layer, a first tungsten plug, a fourth insulation layer, a first metal layer, a fifth insulation layer, a second metal layer, a sixth insulation layer, a third metal layer, a first passivation layer, and the first tungsten plug layer sequentially stacked.
19 . The display panel of claim 1 , wherein the oxide transistor layer comprises a lap-joint electrode layer, a second passivation layer, an oxide active layer, a seventh insulation layer, a second gate layer, an eighth insulation layer, a second source drain layer, a third passivation layer, and a second tungsten plug sequentially stacked on the silicon substrate; and wherein the lap-joint electrode layer comprises a first lap-joint electrode and a first signal line, and the first lap-joint electrode covers the first tungsten plug; the second source drain layer comprises a source and the drain, the source is electrically connected to both an end of the oxide active layer and the first signal line, and the drain is electrically connected to both another end of the oxide active layer and the first lap-joint electrode; the second tungsten plug is disposed on the drain and passes through the third passivation layer, and the second tungsten plug is electrically connected between the drain and an anode of a light-emitting device in the display panel.
20 . The display panel of claim 1 , wherein the silicon substrate comprises a single-crystal silicon active layer, a first source drain layer, a first insulation layer, a first gate layer, a connection layer, a second insulation layer, a third insulation layer, a first tungsten plug, a fourth insulation layer, a first metal layer, a fifth insulation layer, a second metal layer, a sixth insulation layer, a third metal layer, a first passivation layer, and the first tungsten plug layer sequentially stacked; and wherein the oxide transistor layer comprises a lap-joint electrode layer, a second passivation layer, an oxide active layer, a seventh insulation layer, a second gate layer, an eighth insulation layer, a second source drain layer, a third passivation layer, and a second tungsten plug sequentially stacked on the silicon substrate; wherein the lap-joint electrode layer comprises a first lap-joint electrode and a first signal line, and the first lap-joint electrode covers the first tungsten plug; the second source drain layer comprises a source and the drain, the source is electrically connected to both an end of the oxide active layer and the first signal line, and the drain is electrically connected to both another end of the oxide active layer and the first lap- joint electrode; the second tungsten plug is disposed on the drain and passes through the third passivation layer, and the second tungsten plug is electrically connected between the drain and an anode of a light-emitting device in the display panel.

Description

RELATED APPLICATIONS This application is a National Phase of PCT Patent Application No. PCT/CN2023/100308 having International filing date of Jun. 14, 2023, which claims the benefit of priority of China Patent Application No. 202310344182.3 filed on Mar. 29, 2023. The contents of the above applications are all incorporated by reference as if fully set forth herein in their entirety. TECHNICAL FIELD The present disclosure relates to display technologies, and in particular to display devices. BACKGROUND Silicon-based organic light-emitting diodes (OLEDs) micro display technology is at an intersection point of microelectronics technology and optoelectronics technology. Combining OLEDs technology and complementary metal oxide semiconductor (CMOS) technology, the silicon-based OLEDs micro display technology is intersection and integration of optoelectronics industry and microelectronics industry, promoting development of a new generation of micro displays. Compared to existing glass-based OLEDs, silicon-based OLEDs can significantly increase pixel per inch (PPI) while reducing a physical size of a display panel due to a fact that a pixel circuit of the silicon-based OLEDs is directly placed on a silicon wafer and prepared by a wafer process, making the silicon-based OLEDs have broad application prospects in AR/VR displays. An existing silicon-based OLED display panel with a pixel circuit and a peripheral driving circuit is generally prepared by directly evaporating OLED devices and an encapsulation layer on a wafer. However, due to a material of an active layer in the silicon-based OLED display panel is single-crystal silicon, resulting in a higher off-state current of the silicon-based OLED display panel. Under low-frequency driving, a driving current may change due to a high leakage current, ultimately causing a phenomenon of display flickering. SUMMARY The present disclosure provides a display panel to alleviate a technical problem of flickering of a display panel with high PPI. To solve the above-mentioned problem, technical solutions provided by the present disclosure are as follows. The present disclosure provides a display panel, which includes: a silicon substrate including a single-crystal silicon transistor; andan oxide transistor layer disposed on a side of the silicon substrate and including an oxide transistor;in which the oxide transistor is electrically connected to the single-crystal silicon transistor. Optionally, in some embodiments of the present disclosure, the silicon substrate includes a first passivation layer and a first connection element, the first connection element is disposed in the first passivation layer and passes through the first passivation layer; the oxide transistor is electrically connected to the single-crystal silicon transistor through the first connection element. Optionally, in some embodiments of the present disclosure, the oxide transistor layer includes a second passivation layer, a first lap-joint electrode, and a first signal line disposed close to a side of the silicon substrate, the first signal line and the first lap-joint electrode are disposed in a same layer and spaced apart, the first lap-joint electrode covers the first connection element, and the second passivation layer covers the first lap-joint electrode and the first signal line; and in which the first signal line is electrically connected to a source of the oxide transistor, and the first lap-joint electrode is electrically connected to a drain of the oxide transistor. Optionally, in some embodiments of the present disclosure, the silicon substrate further includes a second connection element, the second connection element and the first connection element are disposed in a same layer and spaced apart, and the second connection element passes through the first passivation layer; the oxide transistor layer includes a second passivation layer, a first lap-joint electrode, and a second lap-joint electrode disposed close to a side of the silicon substrate, the second lap-joint electrode and the first lap-joint electrode are disposed in a same layer and spaced apart, the first lap-joint electrode covers the first connection element, the second lap-joint electrode covers the second connection element, and the second passivation layer covers the first lap-joint electrode and the second lap-joint electrode; and in which the first connection element is electrically connected to the single-crystal silicon transistor, and electrically connected to a drain of the oxide transistor through the first lap-joint electrode; and the second connection element is electrically connected to a second signal line in the silicon substrate, and electrically connected to a source of the oxide transistor through the second lap-joint electrode. Optionally, in some embodiments of the present disclosure, the silicon substrate further includes a second connection element, the second connection element and the first connection element