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US-12622140-B2 - Display apparatus

US12622140B2US 12622140 B2US12622140 B2US 12622140B2US-12622140-B2

Abstract

A display apparatus including a first thin-film transistor (TFT) including a first semiconductor layer including a silicon semiconductor; a second TFT including a second semiconductor layer including an oxide semiconductor; a first shielding layer configured to overlap the first TFT and positioned between a substrate and the first TFT; and a second shielding layer configured to overlap the second TFT and positioned between the substrate and the second TFT.

Inventors

  • Seongmin Wang
  • Youngin HWANG
  • Yongho YANG

Assignees

  • SAMSUNG DISPLAY CO., LTD.

Dates

Publication Date
20260505
Application Date
20240618
Priority Date
20180907

Claims (20)

  1. 1 . A display apparatus comprising a first pixel and a second pixel in display area, each of the first pixel and the second pixel comprising: a driving transistor comprising a first semiconductor layer comprising a silicon and a first gate electrode; a first switching transistor comprising a second semiconductor layer comprising a silicon and a second gate electrode; a second switching transistor comprising a third semiconductor layer comprising an oxide and a third gate electrode; a first capacitor comprising a first electrode and a second electrode; a first shielding layer overlapping the driving transistor, the first shielding layer interposed between a substrate and the first semiconductor layer; and a second shielding layer overlapping the second switching transistor, the second shielding layer interposed between the substrate and the third semiconductor layer, wherein the first electrode of the first capacitor is a part of a scan line connected to the second gate electrode, and the second electrode of the first capacitor is a part of the third semiconductor layer.
  2. 2 . The display apparatus of claim 1 , further comprising a first connecting electrode connected to the first gate electrode and the third semiconductor layer in each of the first pixel and the second pixel.
  3. 3 . The display apparatus of claim 2 , wherein at least one of the first electrode and the second electrode of the first capacitor overlaps the first connecting electrode.
  4. 4 . The display apparatus of claim 2 , wherein the first capacitor overlaps the second shielding layer.
  5. 5 . The display apparatus of claim 1 , wherein the second shielding layer of the first pixel and the second shielding layer of the second pixel are one body.
  6. 6 . The display apparatus of claim 1 , wherein a same voltage is applied to the third gate electrode and the second shielding layer.
  7. 7 . The display apparatus of claim 1 , further comprising a second connecting electrode connected to the first semiconductor layer and the third semiconductor layer in each of the first pixel and the second pixel.
  8. 8 . The display apparatus of claim 7 , further comprising a third switching transistor comprising a fourth semiconductor layer comprising a silicon and a fourth gate electrode.
  9. 9 . The display apparatus of claim 8 , further comprising a control line connected to the fourth gate electrode of the third switching transistor, the control line overlaps the first shielding layer.
  10. 10 . The display apparatus of claim 1 , further comprising a power line overlapping first shielding layers and second shielding layers of the first pixel and the second pixel.
  11. 11 . The display apparatus of claim 1 , wherein the scan line and the second gate electrode are one body.
  12. 12 . A display apparatus comprising a first pixel and a second pixel in display area, each of the first pixel and the second pixel comprising: a driving transistor comprising a first semiconductor layer comprising silicon and a first gate electrode; a first switching transistor comprising a second semiconductor layer comprising an oxide and a second gate electrode; a first shielding layer overlapping the driving transistor, the first shielding layer interposed between a substrate and the first semiconductor layer; a second shielding layer overlapping the first switching transistor, the second shielding layer interposed between the substrate and the second semiconductor layer; a second connecting electrode on the second gate electrode and connected to the first semiconductor layer and the second semiconductor layer; and a first connecting electrode on the second gate electrode and connected to the first gate electrode and the second semiconductor layer, wherein a part of the first connection electrode overlaps the first shielding layer in a plan view, and the second shielding layer of the first pixel and the second shielding layer of the second pixel are one body.
  13. 13 . The display apparatus of claim 12 , further comprising a power line overlapping first shielding layers and second shielding layers of the first pixel and the second pixel.
  14. 14 . The display apparatus of claim 12 , wherein each of the first pixel and the second pixel further comprises a capacitor overlapping the driving transistor.
  15. 15 . The display apparatus of claim 14 , wherein the capacitor comprises a first electrode and a second electrode, and the second electrode of the capacitor and the second shielding layer are disposed on the same layer.
  16. 16 . The display apparatus of claim 14 , wherein a layer on which the first shielding layer is disposed and a layer on which the second shielding layer is disposed are different from each other.
  17. 17 . A display apparatus comprising a first pixel and a second pixel in display area, each of the first pixel and the second pixel comprising: a driving transistor comprising a first semiconductor layer comprising a silicon and a first gate electrode; a first switching transistor comprising a second semiconductor layer comprising an oxide and a second gate electrode; a second switching transistor comprising a third semiconductor layer comprising a silicon and a third gate electrode; a first shielding layer overlapping the driving transistor, the first shielding layer interposed between a substrate and the first semiconductor layer; a second shielding layer overlapping the first switching transistor, the second shielding layer interposed between the substrate and the second semiconductor layer; and a control line connected to the third gate electrode of the second switching transistor, wherein the control line overlaps the first shielding layers of the first pixel and the second pixel.
  18. 18 . The display apparatus of claim 17 , wherein a same voltage is applied to the second gate electrode and the second shielding layer.
  19. 19 . The display apparatus of claim 17 , wherein the control line and the third gate electrode are one body.
  20. 20 . The display apparatus of claim 19 , further comprising a third switching transistor comprising a fourth semiconductor layer comprising a silicon and a fourth gate electrode, wherein the second semiconductor layer and the fourth semiconductor layer are one body.

Description

CROSS-REFERENCE TO RELATED APPLICATION This is a continuation application of U.S. patent application Ser. No. 18/138,870, filed Apr. 25, 2023, now U.S. Pat. No. 12,048,208, which issued Jul. 23, 2024, the disclosure of which is incorporated herein by reference in its entirety. U.S. patent application Ser. No. 18/138,870 is a continuation application of U.S. patent application Ser. No. 17/199,890, filed Mar. 12, 2021, now U.S. Pat. No. 11,659,738, which issued May 23, 2023, the disclosure of which is incorporated herein by reference in its entirety. U.S. patent application Ser. No. 17/199,890 is a continuation application of U.S. patent application Ser. No. 16/365,757, filed Mar. 27, 2019, now U.S. Pat. No. 10,978,538, which issued Apr. 13, 2021, the disclosure of which is incorporated herein by reference in its entirety. U.S. patent application Ser. No. 16/365,757 claims priority to and benefits of Korean Patent Application No. 10-2018-0107379 under 35 U.S.C. § 119, filed Sep. 7, 2018, in the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. BACKGROUND Field Exemplary embodiments of the invention relate generally to a display apparatus. Discussion of the Background Display apparatuses, such as organic light-emitting display apparatuses, liquid crystal display (LCD) apparatuses, and the like, include an array substrate including a thin-film transistor (TFT), a capacitor, and a plurality of wirings. The array substrate includes fine patterns, such TFTs, capacitors, and wirings, and such a display apparatus is driven by complicated connections between the TFT, the capacitor, and the wirings. As demand for display apparatuses having compact sizes and high resolution has increased, demand for efficient space arrangement between the TFT, the capacitor, and the wirings of the display apparatus, a connection structure thereof, a driving method, and quality improvement of a realized image is also increasing. The above information disclosed in this Background section is only for understanding of the background of the inventive concepts, and, therefore, it may contain information that does not constitute prior art. SUMMARY Devices constructed according to exemplary implementations of the invention disclose a display apparatus including a transistor with an improved characteristics. Additional features of the inventive concepts will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the inventive concepts. According to one or more embodiments, a display apparatus includes: a first thin-film transistor (TFT) (e.g., T1 discussed with reference to drawings) including a first semiconductor layer including a silicon semiconductor; a second TFT (e.g., T3 discussed with reference to drawings) including a second semiconductor layer including an oxide semiconductor, one end of the second semiconductor layer being connected to one end of the first semiconductor layer of the first TFT and the other end of the second semiconductor layer being connected to a gate electrode of the first TFT; a first shielding layer configured to overlap the first TFT, the first shielding layer interposed between a substrate and the first TFT; and a second shielding layer configured to overlap the second TFT, the first shielding layer interposed between the substrate and the second TFT. The first shielding layer and the second shielding layer may be positioned on the same layer. The first shielding layer and the second shielding layer may be positioned on different layers. The second shielding layer may be positioned on the same layer as the first semiconductor layer. The second shielding layer may be positioned on the same layer as a gate electrode of the first TFT. The display apparatus may further include a capacitor overlapping the first TFT, wherein the second shielding layer may be positioned on the same layer as one electrode of the capacitor. The display apparatus may further include a capacitor overlapping the second shielding layer and positioned between the second shielding layer and the second TFT. One electrode of the capacitor may be positioned on the same layer as one of the first semiconductor layer of the first TFT and a gate electrode of the first TFT overlapping a channel region of the first semiconductor layer. The display apparatus may further include at least one of: a first touch sensor overlapping the first TFT; and a second touch sensor overlapping the second shielding layer and positioned between the second shielding layer and the substrate. The first shielding layer may be electrically connected to a power line for applying a power voltage. The first shielding layer may be electrically connected to a power line for applying an initialization voltage. The first shielding layer may be electrically connected to the first semiconductor layer. The first shielding layer may be electrically connecte