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US-12622143-B2 - Display substrate and display apparatus

US12622143B2US 12622143 B2US12622143 B2US 12622143B2US-12622143-B2

Abstract

A display substrate has a display region and a dummy pixel region including at least one pixel missing region and a redundant region; the display substrate includes a base substrate and a driving circuit layer including a plurality of circuit units, at least one of which includes a pixel driving circuit and initial signal lines; the pixel driving circuit includes first and second pixel driving circuits in the display region and the redundant region, respectively, and a capacitance value of a storage capacitor in the first pixel driving circuit is less than that in the second pixel driving circuit; the initial signal lines include first and second initial signal lines extending along first and second directions, respectively; the first initial signal line is electrically connected to at least a part of the second initial signal lines crossing the first initial signal line.

Inventors

  • Huijuan Yang
  • Tingliang Liu
  • Yi Zhang
  • Xiaoqing SHU
  • Maoying LIAO
  • Yu Wang

Assignees

  • CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
  • BOE TECHNOLOGY GROUP CO., LTD.

Dates

Publication Date
20260505
Application Date
20220331

Claims (17)

  1. 1 . A display substrate, having a display region and a dummy pixel region adjacent to the display region, wherein the dummy pixel region comprises at least one pixel missing region and a redundant region adjacent to the at least one pixel missing region; and the display substrate comprises: a base substrate; a driving circuit layer on the base substrate, wherein the driving circuit layer comprises a plurality of circuit units; at least one of the plurality of circuit units comprises a plurality of pixel driving circuits and a plurality of initial signal lines; the plurality of pixel driving circuits comprise a first pixel driving circuit in the display region and a second pixel driving circuit in the redundant region, and a capacitance value of a storage capacitor in the first pixel driving circuit is less than a capacitance value of a storage capacitor in the second pixel driving circuit; and a light emitting structure layer on a side of the driving circuit layer away from the base substrate, wherein the light emitting structure layer comprises a plurality of light emitting devices in the display region, wherein the plurality of initial signal lines comprise a plurality of first initial signal lines each extending along a first direction and a plurality of second initial signal lines each extending along a second direction; the first direction and the second direction cross each other, and each of the plurality of first initial signal lines is electrically connected to at least a part of the plurality of second initial signal lines crossing the first initial signal line, wherein the driving circuit layer comprises a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer in this order away from the base substrate; the semiconductor layer comprises active layers of a plurality of transistors in the pixel driving circuit; the first conductive layer comprises a scanning signal line, gate electrodes of the plurality of transistors and a first plate of the storage capacitor; the second conductive layer comprises the first initial signal line and a second plate of the storage capacitor; and the fourth conductive layer comprises the second initial signal line, wherein the second initial signal line comprises an extension part and a connection part connected to each other; the extension part extends in the second direction, and the connection part is connected to the first initial signal line, wherein in the circuit unit having the first pixel driving circuit, an overlapping region between orthographic projections of the second plate of the storage capacitor and the extension part on the base substrate is a first region; in the circuit unit having the second pixel driving circuit, an overlapping region between orthographic projections of the second plate of the storage capacitor and the extension part on the base substrate is a second region; and an area of the first region is less than an area of the second region.
  2. 2 . The display substrate according to claim 1 , wherein the first pixel driving circuit and the second pixel driving circuit each comprise a first transistor, a second transistor, a third transistor, a fourth transistor, a seventh transistor, and the storage capacitor; and the first pixel driving circuit further comprises a fifth transistor and a sixth transistor.
  3. 3 . The display substrate according to claim 1 , wherein the display substrate comprises i number of rows and j number of columns of circuit units; i≥2; j≥3; and both of i and j are integers; wherein a shape of the second initial signal line in the circuit unit in an M th row and an N th column and a shape of the second initial signal line in the circuit unit in an (M+1) th row and an (N+2) th column are substantially the same as each other; a shape of the second initial signal line in the circuit unit in the (M+1) th row and the N th column and a shape of the second initial signal line in the circuit unit in the M th row and the (N+2) th column are substantially the same as each other, wherein 1≤M≤i; 1≤N≤j; and both of M and N are integers.
  4. 4 . The display substrate according to claim 3 , wherein in the circuit unit in the M th row and the N th column and the circuit unit in the (M+1) th row and the (N+2) th column, the extension part comprises a first initial section, a second initial section and a third initial section sequentially connected together along the second direction, the first initial section and the third initial section each extend along the second direction, and a first included angle θ 1 exists between an extending direction of the second initial section and the second direction, 0°≤θ 1 ≤90°.
  5. 5 . The display substrate according to claim 3 , wherein in the circuit unit in the M th row and the (N+2) th column and the circuit unit in the M th row and the N th column, the extension part comprises a fourth initial section, a fifth initial section, a sixth initial section, a seventh initial section and an eighth initial section sequentially connected along the second direction, the fourth initial section, the sixth initial section and the eighth initial section each extend along the second direction, a second included angle θ 2 exists between an extending direction of the fifth initial section and the second direction, a third included angle θ 3 exists between an extending direction of the seventh initial section and the second direction, 0°≤θ 2 ≤90°, and 0°≤θ 3 ≤90°.
  6. 6 . The display substrate according to claim 1 , wherein the plurality of circuit units further comprise a plurality of first power supply lines, an orthographic projection of the extension part on the base substrate at least partially overlaps an orthographic projection of a corresponding one of the plurality of first power supply lines on the base substrate; and an orthographic projection of the connection part on the base substrate at least partially overlaps an orthographic projection of the first initial signal line on the base substrate.
  7. 7 . The display substrate according to claim 6 , wherein the first power supply line is a polygonal line of unequal width; the first power supply line comprises a first power supply section, a second power supply section, a third power supply section, a fourth power supply section and a fifth power supply section sequentially connected along the second direction; the first power supply section, the third power supply section, and the fifth power supply section each extend along the second direction, and an extending direction of the second power supply section and an extending direction of the fourth power supply section are different from each other and each cross the second direction.
  8. 8 . The display substrate according to claim 6 , wherein the first power supply line is in the third conductive layer.
  9. 9 . The display substrate according to claim 6 , wherein the second conductive layer further comprises a shielding electrode electrically connected to the first power supply line through a via.
  10. 10 . The display substrate according to claim 9 , wherein an orthographic projection of at least a part of the shielding electrode on the base substrate is between orthographic projections of a data signal line and a second electrode of the first transistor in the pixel driving circuit on the base substrate.
  11. 11 . The display substrate according to claim 1 , wherein the plurality of circuit units further comprise a plurality of data signal lines in the fourth conductive layer.
  12. 12 . The display substrate according to claim 1 , wherein the plurality of circuit units further comprise a plurality of second connection electrodes; the connection part is connected to a corresponding one of the plurality of second connection electrodes through a via; the second connection electrode is connected to the first initial signal line through a via; the second connection electrode is further connected to a first region of a first transistor and a second region of a seventh transistor in the pixel driving circuit through vias.
  13. 13 . The display substrate according to claim 12 , wherein the plurality of second connection electrodes are in the third conductive layer.
  14. 14 . The display substrate according to claim 1 , wherein an overlapping area between a first plate and a second plate of the storage capacitor in the first pixel driving circuit is less than an overlapping area between a first plate and a second plate of the storage capacitor in the second pixel driving circuit.
  15. 15 . The display substrate according to claim 1 , wherein the plurality of circuit units form a plurality of unit rows arranged side by side along the second direction and a plurality of unit columns arranged side by side along the first direction, the pixel driving circuits in each of the plurality of unit rows are arranged side by side along the first direction; the pixel driving circuits in each of the plurality of unit columns are arranged side by side along the second direction; and the second initial signal lines in all the circuit units in each of at least one of the plurality of unit columns are connected to each other.
  16. 16 . The display substrate according to claim 15 , wherein the plurality of unit columns comprise a plurality of first unit columns and a plurality of second unit columns alternately arranged; and each of the plurality of second initial signal lines is arranged in a corresponding one of the plurality of first unit columns.
  17. 17 . A display apparatus, comprising the display substrate according to claim 1 .

Description

TECHNICAL FIELD The present disclosure belongs to the field of display technology, and particularly relates to a display substrate and a display apparatus. BACKGROUND Organic Light Emitting Diode (OLED) and Quantum-dot Light Emitting Diode (QLED) are active light emitting display devices, and have the advantages of self-luminescence, wide viewing angle, high contrast, low power consumption, ultra high response speed, light weight and thinness, flexibility, low cost, and the like. With the continuous development of the display technology, a flexible display apparatus using an OLED or a QLED as a light emitting device and using a Thin Film Transistor (TFT) for signal control has become a mainstream product in the display field. SUMMARY The present disclosure aims to solve at least one technical problem in the prior art and provides a display substrate and a display apparatus. In a first aspect, an embodiment of the present disclosure provides a display substrate having a display region and a dummy pixel region surrounding the display region, where the dummy pixel region includes at least one pixel missing region and a redundant region adjacent to the pixel missing region; and the display substrate includes: a base substrate;a driving circuit layer on the base substrate, where the driving circuit layer includes a plurality of circuit units; at least one of the plurality of circuit units includes a plurality of pixel driving circuits and a plurality of initial signal lines; the plurality of pixel driving circuits include a first pixel driving circuit in the display region and a second pixel driving circuit in the redundant region, and a capacitance value of a storage capacitor in the first pixel driving circuit is less than a capacitance value of a storage capacitor in the second pixel driving circuit; anda light emitting structure layer on side of the driving circuit layer away from the base substrate, where the light emitting structure layer includes a plurality of light emitting devices in the display region,where the plurality of initial signal lines include a plurality of first initial signal lines each extending along a first direction and a plurality of second initial signal lines each extending along a second direction; the first direction and the second direction cross each other, and each of the plurality of first initial signal lines is electrically connected to at least a part of the plurality of second initial signal lines crossing the first initial signal line. The first pixel driving circuit and the second pixel driving circuit each include a first transistor, a second transistor, a third transistor, a fourth transistor, a seventh transistor, and the storage capacitor; and the first pixel driving circuit further includes a fifth transistor and a sixth transistor. The driving circuit layer includes a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer in this order away from the base substrate; the semiconductor layer includes active layers of a plurality of transistors in the pixel driving circuit; the first conductive layer includes a scanning signal line, gate electrodes of the plurality of transistors and a first plate of the storage capacitor; the second conductive layer includes the first initial signal line and a second plate of the storage capacitor; and the fourth conductive layer includes the second initial signal line. The second initial signal line includes an extension part and a connection part connected to each other; the extension part extends in the second direction, and the connection part is connected to the first initial signal line. In the circuit unit having the first pixel driving circuit, an overlapping region between orthographic projections of the second plate of the storage capacitor and the extension part on the base substrate is a first region; in the circuit unit having the second pixel driving circuit, an overlapping region between orthographic projections of the second plate of the storage capacitor and the extension part on the base substrate is a second region; and an area of the first region is less than an area of the second region. The display substrate includes i number of rows and j number of columns of circuit units; i≥2; j≥3; and both of i and j are integers; where a shape of the second initial signal line in the circuit unit in an Mth row and an Nth column and a shape of the second initial signal line in the circuit unit in an (M+1)th row and an (N+2)th column are substantially the same as each other; a shape of the second initial signal line in the circuit unit in the (M+1)th row and the Nth column and a shape of the second initial signal line in the circuit unit in the Mth row and the (N+2)th column are substantially the same as each other, where 1≤M≤i; 1≤N≤j; and both of M and N are integers. In the circuit unit in the Mth row and the Nth column and the circuit unit in the (M+