US-12622189-B2 - Method for manufacturing a composite structure comprising a thin single-crystal semiconductor layer on a carrier substrate
Abstract
A method of manufacturing a composite structure comprises: a) providing a donor substrate of a single-crystal semiconductor material, b) implanting ions into the donor substrate, excluding an annular peripheral region, to form a buried brittle plane, the implantation conditions defining a first thermal budget for obtaining bubbling on a face of the donor substrate and a second thermal budget for obtaining a fracture in the brittle plane, c) forming a stiffening film on the donor substrate, carried out by applying a thermal budget lower than the first thermal budget, the stiffening film being perforated in the form of a mesh, the perforated stiffening film leaving a plurality of zones of the front face bare, d) depositing a carrier substrate on the donor substrate carried out by applying a thermal budget greater than the first thermal budget, and e) separating the donor substrate along the brittle plane.
Inventors
- Hugo BIARD
- Didier Landru
Assignees
- SOITEC
Dates
- Publication Date
- 20260505
- Application Date
- 20220314
- Priority Date
- 20210323
Claims (19)
- 1 . A method of fabricating a composite structure comprising a thin layer of a single-crystal semiconductor, the thin layer being disposed on a carrier substrate, the method comprising: a) providing a donor substrate composed of the single-crystal semiconductor; b) implanting ions of a light species into the donor substrate, with the exception of an annular peripheral region of the donor substrate, under implantation conditions, to form a buried weak plane delimiting the thin layer between the buried weak plane and a front side of the donor substrate; the buried weak plane comprising lenticular microcavities apt to develop, when activated thermally, into microcracks; the implantation conditions defining a first thermal budget for obtaining blistering on the front side of the donor substrate, and a second thermal budget for obtaining splitting in the buried weak plane; and the blistering corresponding to deformation of the thin layer plumb with the microcracks, and the splitting corresponding to complete splitting in the buried weak plane; c) forming a stiffening film on the donor substrate, carried out with application of a thermal budget lower than the first thermal budget, the stiffening film: being apertured and taking, in the plane of the front side, the form of a grid with a degree of coverage between 5% and 30%, and leaving a plurality of regions of the front side bare, these regions taking the form of features the lateral dimensions of which are smaller than or equal to 50 microns; and having a thickness larger than or equal to 0.5 microns; d) depositing a carrier substrate on the front side of the donor substrate, the front side having the stiffening film thereon, the depositing of the carrier substrate being carried out with application of a thermal budget higher than the first thermal budget; and e) cleaving to form the composite structure and a remainder of the donor substrate.
- 2 . The method of claim 1 , wherein the annular peripheral region of the donor substrate in which ions are not implanted has a width between 1 mm and 2 cm.
- 3 . The method of claim 2 , wherein the depositing of the carrier substrate is carried out with application of a thermal budget higher than or equal to the second thermal budget.
- 4 . The method of claim 3 , wherein the single-crystal semiconductor of the donor substrate comprises a material selected from among the group consisting of: silicon carbide, silicon, germanium, a III-V or III-N compound, diamond, and gallium oxide.
- 5 . The method of claim 4 , wherein the stiffening film comprises a material selected from among the group consisting of: tungsten, silicon carbide, silicon, silicon nitride, boron nitride, silicon oxide, aluminum oxide, and aluminum nitride.
- 6 . The method of claim 5 , wherein the forming of the stiffening film comprises one or more sequences of depositing, bonding, photolithography, nanoimprinting, etching and/or thinning.
- 7 . The method of claim 6 , wherein the thickness of the apertured stiffening film is between 0.5 microns and 5 microns.
- 8 . The method of claim 7 , wherein the carrier substrate has a single-crystal or polycrystalline structure and comprises at least one material selected from among the group consisting of: silicon carbide, silicon, diamond, a III-V compound, and gallium oxide.
- 9 . The method of claim 8 , wherein, after the depositing of the carrier substrate, the carrier substrate has a thickness larger than or equal to 50 microns.
- 10 . The method of claim 9 , further comprising, after the cleaving, carrying out one or more mechanical and/or chemical and/or heat treatments on the composite structure to smooth the free surface of the thin layer and/or to improve the quality of the edges of the composite structure and/or to correct the thickness uniformity of the composite structure.
- 11 . The method of claim 10 , further comprising reconditioning the remainder of the donor substrate to form a new donor substrate.
- 12 . The method of claim 1 , wherein the depositing of the carrier substrate is carried out with application of a thermal budget higher than or equal to the second thermal budget.
- 13 . The method of claim 1 , wherein the single-crystal semiconductor of the donor substrate comprises a material selected from among the group consisting of: silicon carbide, silicon, germanium, a III-V or III-N compound, diamond, and gallium oxide.
- 14 . The method of claim 1 , wherein the stiffening film comprises a material selected from among the group consisting of: tungsten, silicon carbide, silicon, silicon nitride, boron nitride, silicon oxide, aluminum oxide, and aluminum nitride.
- 15 . The method of claim 1 , wherein the forming of the stiffening film comprises one or more sequences of depositing, bonding, photolithography, nanoimprinting, etching and/or thinning.
- 16 . The method of claim 1 , wherein the thickness of the apertured stiffening film is between 0.5 microns and 5 microns.
- 17 . The method of claim 1 , wherein the carrier substrate has a single-crystal or polycrystalline structure and comprises at least one material selected from among the group consisting of: silicon carbide, silicon, diamond, a III-V compound, and gallium oxide.
- 18 . The method of claim 1 , wherein, after the depositing of the carrier substrate, the carrier substrate has a thickness larger than or equal to 50 microns.
- 19 . The method of claim 1 , further comprising, after the cleaving, carrying out one or more mechanical and/or chemical and/or heat treatments on the composite structure to smooth the free surface of the thin layer and/or to improve the quality of the edges of the composite structure and/or to correct the thickness uniformity of the composite structure.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS This application is a national phase entry under 35 U.S.C. § 371 of International Patent Application PCT/FR2022/050454, filed Mar. 14, 2022, designating the United States of America and published as International Patent Publication WO 2022/200712 A1 on Sep. 29, 2022, which claims the benefit under Article 8 of the Patent Cooperation Treaty of French Patent Application Serial No. FR2102921, filed Mar. 23, 2021. TECHNICAL FIELD The present disclosure relates to the field of semiconductors for microelectronic components. It, in particular, relates to a method for fabricating a composite structure comprising a thin layer made of single-crystal semiconductor placed on a carrier substrate: the thin layer may, for example, be made of single-crystal silicon carbide and the carrier substrate made of polycrystalline silicon carbide. BACKGROUND Silicon carbide (SiC) is increasingly widely used to fabricate innovative power devices meeting the needs of growing fields of application of electronics, such as electric vehicles, in particular. Specifically, power devices and integrated power-supply systems based on single-crystal silicon carbide are able to handle a much higher power density than their conventional silicon equivalents, and to do so with active regions of smaller size. To further limit the dimensions of power devices on SiC, it is advantageous to produce vertical rather than lateral components. For this, vertical electrical conduction, between an electrode positioned on the front side of the SiC structure and an electrode positioned on the back side, must be permitted by the structure. Nevertheless, single-crystal SiC substrates intended for the microelectronics industry remain expensive and difficult to produce with large diameters. It is therefore advantageous to employ solutions for transferring thin layers to produce composite structures, which typically comprise a thin layer of single-crystal SiC on a less expensive carrier substrate. One well-known solution for transferring thin layers is the Smart Cut® process, which is based on implantation of light ions and bonding by direct bonding. Such a process, for example, makes it possible to fabricate a composite structure, which comprises, in direct contact, a thin layer of single-crystal SiC (c-SiC) detached from a donor substrate made of c-SiC, and a carrier substrate made of polycrystalline SiC (p-SiC), and which permits vertical electrical conduction. Nevertheless, it remains difficult to produce by molecular adhesion a good-quality direct bond between two c-SiC and p-SiC substrates, since dealing with the surface finish and roughness of the substrates is complex. U.S. Pat. No. 8,436,363 avoids direct bonding by providing a method for fabricating a composite structure comprising a thin layer made of c-SiC placed on a metal carrier substrate the coefficient of thermal expansion of which matches that of the thin layer. This fabricating method comprises the following steps: forming a buried weak plane in a c-SiC donor substrate, delimiting a thin layer between the buried weak plane and a front surface of the donor substrate,depositing a metal layer, for example, made of tungsten or molybdenum, on the front side of the donor substrate in order to form a carrier substrate of a sufficient thickness to play the role of stiffener,splitting along the buried weak plane, leading to cleaving between, on the one hand, the composite structure comprising the metal carrier substrate and the thin layer made of c-SiC and, on the other hand, the remainder of the donor substrate made of c-SiC. Such a fabricating method is however incompatible when the material from which the carrier substrate is formed is p-SiC, which requires deposition at temperatures higher than 1000° C., or even higher than or equal to 1200° C. (usual temperatures for the fabrication of p-SiC). Specifically, at these high temperatures, the rate of growth of the cavities and microcracks present in the buried weak plane is higher than the rate of growth of the p-SiC layer, and the thickness required for a stiffening effect to be achieved is not reached before the onset of blistering, which is related to deformation of the thin layer plumb with the microcracks. Although the underlying problem was described above with reference to a composite structure made of silicon carbide, it may arise with any type of semiconductor from which it is envisioned to detach a thin layer using a weakening technique based on implantation of a light species, and for which the thermal budget that results in blistering (blistering activation budget) is lower than the thermal budget required for the deposition of the carrier substrate. The thermal budgets of blistering and splitting have been widely studied for many single-crystal semiconductors such as silicon, silicon carbide, germanium, III-V compounds, etc. (see, for example, Aspar et al., “The generic nature of the Smart Cut® process