US-12622227-B2 - Power semiconductor module, method for manufacturing the same and electrical converter

US12622227B2US 12622227 B2US12622227 B2US 12622227B2US-12622227-B2

Abstract

A power semiconductor module ( 34 ), comprising a substrate ( 12 ) which carries a plurality of power semiconductor devices ( 10 ), wherein the plurality of power semiconductor devices ( 10 ) comprises a first group of power semiconductor devices ( 10 ) and a second group of at least one power semiconductor device ( 10 ). The first group of power semiconductor devices ( 10 ) consists of at least two non-damaged power semiconductor devices ( 10 b, 10 c ), and the second group of power semiconductor devices ( 10 ) consists of at least one damaged power semiconductor device ( 10 a ). The at least two non-damaged power semiconductor devices ( 10 b, 10 c ) are electrically interconnected in a parallel configuration, and the second group of at least one power semiconductor device ( 10 ) is electrically separated from the members of the first group of power semiconductor devices ( 10 ). The disclosure further relates to an electrical converter and a method for manufacturing a power semiconductor module ( 34 ).

Inventors

Slavo KICIN
Gernot Riedel
Jürgen SCHUDERER
Fabian Mohn

Assignees

HITACHI ENERGY LTD

Dates

Publication Date: 20260505
Application Date: 20211216
Priority Date: 20201222

Claims (9)

1 . A power semiconductor module, comprising a substrate which carries a plurality of power semiconductor devices, wherein the plurality of power semiconductor devices comprises a first group of power semiconductor devices and a second group of at least one power semiconductor device, wherein the first group of power semiconductor devices comprises non-damaged power semiconductor devices and at least one power semiconductor device which is provided with a measuring arrangement, wherein the measuring arrangement comprises at least one measuring point for measuring at least one of electronic, magnetic and temperature properties of the at least one power semiconductor device, the at least one measuring point being formed by a pre-determined breaking point corresponding to a position of an electrical interconnection structure having a reduced thickness and/or width, and wherein the second group of power semiconductor devices comprises at least one damaged power semiconductor device, wherein at least two non-damaged power semiconductor devices are electrically interconnected in a parallel configuration, and wherein the second group of at least one power semiconductor device is electrically separated from members of the first group of power semiconductor devices, wherein at least one electrical connection between the at least one damaged power semiconductor device and the non-damaged power semiconductor devices is present.
2 . The power semiconductor module according to claim 1 , wherein electrical connections from a non-damaged power semiconductor device to an emitter and a gate of the at least one damaged power semiconductor device are interrupted, but an electrical connection from a non-damaged power semiconductor device to another contact of the at least one damaged power semiconductor device is present.
3 . The power semiconductor module according to claim 1 , wherein the second group of at least one power semiconductor device is electrically separated from the members of the first group of power semiconductor devices such that the at least one damaged power semiconductor device is left out of a commutation loop or a commutation cell, respectively, of the power semiconductor module.
4 . The power semiconductor module according to claim 1 , wherein the power semiconductor devices are wide bandgap semiconductor power devices, in particular insulated-gate bipolar transistors, IGBTs, silicon carbide metal-oxide-semiconductor field-effect transistors, SiC MOSFETs, or gallium nitride high-electron-mobility transistors, GAN HEMTs.
5 . The power semiconductor module according to claim 1 , wherein the first group of power semiconductor devices form part of a half-bridge configuration of SiC devices.
6 . The power semiconductor of claim 1 , wherein the power semiconductor is part of an electrical converter.
7 . A method for manufacturing a power semiconductor module, wherein the power semiconductor module comprises a plurality of power semiconductor devices, said method comprising: a) providing at least one substrate for carrying the plurality of power semiconductor devices; and b) placing the plurality of power semiconductor devices on the at least one substrate; wherein, the method further comprises manufacturing steps as follows: c) determining, if one or more power semiconductor devices of the plurality of power semiconductor devices are damaged; d) electrically interconnecting at least a part of the power semiconductor devices comprising at least two power semiconductor devices in a parallel configuration; wherein, after realizing the steps e) and d) and in case of at least one power semiconductor device interconnected in a parallel configuration being a damaged power semiconductor device, electrically separating the at least one damaged power semiconductor device from non-damaged power semiconductor devices such that not all electrical connections between the at least one damaged power semiconductor device and the non-damaged power semiconductor devices are removed; and wherein, after realizing the steps c) and d), at least two of the electrically interconnected power semiconductor devices in the parallel configuration are non-damaged power semiconductor devices and at least one power semiconductor device which is provided with a measuring arrangement, wherein the measuring arrangement comprises at least one measuring point for measuring at least one of electronic, magnetic and temperature properties of the at least one power semiconductor device, the at least one measuring point being formed by a pre-determined breaking point corresponding to a position of an electrical interconnection structure having a reduced thickness and/or width.
8 . The method according to claim 7 , wherein the steps c) and d) are repetitively performed in turns multiple times, each time for at least one power semiconductor device of the plurality of power semiconductor devices, each time further comprising: electrically interconnecting a gate contact of a first power semiconductor device, subsequently, determining whether said first power semiconductor device is damaged, and, in case of determining that the first power semiconductor device is damaged, disconnecting the first power semiconductor device.
9 . The method according to claim 7 , further comprising providing in step c) at least one measuring point on at least one of the power semiconductor devices for measuring at least one of an electric, magnetic or temperature parameter in order to detect at least one of a gate-emitter leakage, a collector-emitter leakage, a short circuit or an open circuit in the damaged power semiconductor devices during assembly.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application is US National Stage of International Patent Application PCT/EP2021/086096, filed Dec. 16, 2021, which claims priority to European Patent Application No. 20216589.0, filed on Dec. 22, 2020, the contents of which is incorporated herein by reference. TECHNICAL FIELD The present disclosure relates to an improved method for manufacturing a power semiconductor module showing an improved manufacturing process. The present disclosure further relates to an improved power semiconductor module and electrical converter. BACKGROUND ART Power semiconductor modules are generally widely known in the art. Such power semiconductor modules, for example industrial insulated-gate bipolar transistor (IGBT) modules, comprise a plurality of power semiconductor devices also called chips. Silicon based power devices, such as IGBTs, for example, can be manufactured with high current rating per chip. Wide band gap devices such as silicon carbide metal-oxide-semiconductor field-effect transistors (SiC MOSFETs) or gallium nitride high-electron-mobility transistors (GaN HEMTs), however, have typically low current rating per chip to counteract yield issues coming from semiconductor material and from processing. Consequently, many small devices are often paralleled to achieve competitive (targeted) current rating. However, such a configuration leads to the risk of losing an entire package with all chips if one chip gets damaged during the embedding process. Accordingly, high requirements for the manufacturing process of power semiconductor modules are needed in order to avoid chip losses due to damages. Further, high production costs may arise in case chips are lost despite all requirements. The prior art thus gives room for improvements with this regard. Exemplarily, there is the need for a solution which improves the manufacturing of power semiconductor modules with regard to losing chips due to damages during the manufacturing process of the power semiconductor module. SUMMARY OF INVENTION Embodiments of the disclosure address the above shortcomings in the art in whole or in part, as further explained below. These are addressed at least in part by providing a solution allowing an improved process of manufacturing a power semiconductor module and providing an improved power semiconductor module and electrical converter, which solve or reduce the above mentioned problems. The above-mentioned object is solved at least in part by a power semiconductor module having the features of independent claim 1. The object is further at least in part solved by an electrical converter having the exemplary features and by a method for manufacturing a power semiconductor module having the exemplary features. Further embodiments are given in the dependent claims, in the further description as well as in the figures, wherein the described embodiments can, alone or in any combination of the respective embodiments, provide a feature of the present disclosure unless clearly excluded. According to a first aspect, a method for manufacturing a power semiconductor module, wherein the power semiconductor module comprises a plurality of power semiconductor devices, said method comprising: a) providing at least one substrate for carrying the plurality of power semiconductor devices; andb) placing the plurality of power semiconductor devices on the at least one substrate;wherein the method further comprises manufacturing steps as follows:c) measuring, if one or more power semiconductor devices of the plurality of power semiconductor devices are damaged;d) electrically interconnecting at least a part of the power semiconductor devices comprising at least two power semiconductor devices in a parallel configuration;wherein after realizing the steps c) and d) and in case of one or more power semiconductor devices being a damaged power semiconductor device, electrically separating the one or more damaged power semiconductor devices from the non-damaged power semiconductor devices; andwherein after realizing the steps c) and d) at least two of the electrically interconnected power semiconductor devices in the parallel configuration are non-damaged power semiconductor devices. An advantage of this method is that it provides a solution which allows reducing the danger of losing an entire power semiconductor module despite having damaged chips. Such a method significantly reduces, for example, the danger of module losses and of losing a huge amount of non-damaged chips. Thus, this method significantly improves manufacturing of power semiconductor modules. The method as described is suited for manufacturing a power semiconductor module, wherein the power semiconductor module comprises a plurality of power semiconductor devices. The power semiconductor devices which are part of the power semiconductor module to be formed may generally be electrically interconnected in a parallel configuration. Those parallelly connected