US-12622244-B2 - Method for manufacturing semiconductor structure with diffusion barrier layers

US12622244B2US 12622244 B2US12622244 B2US 12622244B2US-12622244-B2

Abstract

A method for manufacturing a semiconductor structure includes: a base provided with a contact hole is provided; an initial contact structure including a first diffusion barrier layer, a conductive layer and a second diffusion barrier layer stacked onto one another is formed on the base, the first diffusion barrier layer conformably covering the contact hole and covering part of a top surface of the base, the conductive layer covering first diffusion barrier layer and being filled in unoccupied space in the contact hole, the second diffusion barrier layer covering a side of the conductive layer away from first diffusion barrier layer, the initial contact structure outside the contact hole being provided with a groove exposing side walls of conductive layer and second diffusion barrier layer; a third diffusion barrier layer is formed on a side wall of initial contact structure exposed by the groove to obtain a target contact structure.

Inventors

Wentao XU
Lintao Zhang
Lei Yang
Haoran Li

Assignees

CHANGXIN MEMORY TECHNOLOGIES, INC.

Dates

Publication Date: 20260505
Application Date: 20230814
Priority Date: 20221111

Claims (8)

1 . A method for manufacturing a semiconductor structure, comprising: providing a base, the base being provided with a contact hole; forming, on the base, an initial contact structure, and a first groove located on at least one side of the initial contact structure, wherein the initial contact structure comprises a first diffusion barrier layer, a conductive layer and a second diffusion barrier layer stacked onto one another, the first diffusion barrier layer conformably covering the contact hole and the first diffusion barrier layer covering a part of a top surface of the base, the conductive layer covering the first diffusion barrier layer and being filled in the contact hole, the second diffusion barrier layer covering a top surface of the conductive layer, the first groove exposing a side wall of the initial contact structure; and forming a third diffusion barrier layer on the side wall of the initial contact structure to obtain a target contact structure; wherein the method for manufacturing the semiconductor structure further comprises: forming a sacrificial layer on a top surface of the initial contact structure, wherein forming the initial contact structure, the first groove located on at least one side of the initial contact structure, and the sacrificial layer comprises: forming, on the base, a first diffusion barrier material layer, a conductive material layer, a second diffusion barrier material layer and a sacrificial material layer stacked onto one another, the first diffusion barrier material layer conformably covering the contact hole and the first diffusion barrier material layer covering the top surface of the base, the conductive material layer covering the first diffusion barrier material layer and being filled in a remaining portion of the contact hole, the second diffusion barrier material layer covering the conductive material layer, the sacrificial material layer covering the second diffusion barrier material layer; and patterning the first diffusion barrier material laver, the conductive material laver, the second diffusion barrier material layer and the sacrificial material layer to form the initial contact structure, the sacrificial layer, and an initial groove, the initial groove exposing the side wall of the initial contact structure and a side wall of the sacrificial layer, the initial groove comprising the first groove; wherein forming the third diffusion barrier layer on the side wall of the initial contact structure comprises: forming a third diffusion barrier material layer, the third diffusion barrier material layer conformably covering the initial groove and the third diffusion barrier material layer covering a top surface of the sacrificial laver; etching back the third diffusion barrier material layer to form a third initial diffusion barrier layer located on the side wall of the initial contact structure and the side wall of the sacrificial laver; and removing the sacrificial laver, and the third initial diffusion barrier layer located on the side wall of the sacrificial laver, a remaining portion of the third initial diffusion barrier layer located on the side wall of the initial contact structure serving as the third diffusion barrier layer.
2 . The method for manufacturing the semiconductor structure of claim 1 , wherein removing the sacrificial layer, and the third initial diffusion barrier layer located on the side wall of the sacrificial layer comprises: forming a first dielectric material layer on the base, the first dielectric material layer covering the sacrificial layer and the third initial diffusion barrier layer, and the first dielectric material layer being filled in the initial groove; and removing a part of the first dielectric material layer, the sacrificial layer, and the third initial diffusion barrier layer located on the side wall of the sacrificial layer until a top surface of the second diffusion barrier layer is exposed.
3 . The method for manufacturing the semiconductor structure of claim 2 , wherein a material of the first dielectric material layer is the same as a material of the sacrificial layer.
4 . The method for manufacturing the semiconductor structure of claim 1 , wherein a thickness of the second diffusion barrier material layer is equal to a thickness of the third diffusion barrier material layer.
5 . The method for manufacturing the semiconductor structure of claim 1 , wherein the base comprises a substrate, and a second dielectric layer located on the substrate, and the contact hole is located in the second dielectric layer.
6 . The method for manufacturing the semiconductor structure of claim 1 , wherein a material of any one of the first diffusion barrier layer, the second diffusion barrier layer and the third diffusion barrier layer comprises at least one of titanium nitride, tantalum nitride or tungsten nitride.
7 . The method for manufacturing the semiconductor structure of claim 1 , wherein a material of the first diffusion barrier layer, a material of the second diffusion barrier layer and a material of the third diffusion barrier layer are the same.
8 . The method for manufacturing the semiconductor structure of claim 1 , wherein a material of the conductive layer comprises at least one of tungsten, molybdenum, cobalt or copper.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This disclosure is a continuation application of International Patent Application No. PCT/CN2023/075976, filed on Feb. 14, 2023, which is based upon and claims the priority to Chinese Patent Application No. 202211414738.3, filed on Nov. 11, 2022, and entitled “SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE”. The contents of International Patent Application No. PCT/CN2023/075976 and Chinese Patent Application No. 202211414738.3 are incorporated herein by reference in their entireties. BACKGROUND With an improvement of requirements for an integrated density of a semiconductor structure, a critical dimension of the semiconductor structure is gradually reduced. On the one hand, requirements for a precision for the patterning of the semiconductor structure are higher, and on the other hand, a spacing between adjacent conductive structures is continuously reduced. The above factors lead to the problem of a short circuit between the adjacent conductive structures in a manufacturing process. SUMMARY Embodiments of the disclosure relate to the technical field of semiconductors, and in particular to a semiconductor structure and a method for manufacturing a semiconductor structure. Embodiments of the disclosure provide a semiconductor structure and a method for manufacturing a semiconductor structure. According to some embodiments of the disclosure, an aspect of the embodiments of the disclosure provides a method for manufacturing a semiconductor structure. The method includes the following operations. A base is provided. The base is provided with a contact hole. An initial contact structure, and a first groove located on at least one side of the initial contact structure are formed on the base. The initial contact structure includes a first diffusion barrier layer, a conductive layer and a second diffusion barrier layer stacked onto one another. The first diffusion barrier layer conformably covers the contact hole, and the first diffusion barrier layer covers a part of a top surface of the base. The conductive layer covers the first diffusion barrier layer, and is filled in the contact hole. The second diffusion barrier layer covers a top surface of the conductive layer. The first groove exposes a side wall of the initial contact structure. A third diffusion barrier layer is formed on the side wall of the initial contact structure to obtain a target contact structure. According to some embodiments of the disclosure, another aspect of the embodiments of the disclosure provides a semiconductor structure. The semiconductor structure includes a base, and at least one target contact structure located on the base. The base is provided with a contact hole. The at least one target contact structure includes a first diffusion barrier layer, a conductive layer, a second diffusion barrier layer and a third diffusion barrier layer. The first diffusion barrier layer conformably covers the contact hole, and the first diffusion barrier layer covers a part of a top surface of the base. The conductive layer covers the first diffusion barrier layer, and is filled in the contact hole. The second diffusion barrier layer covers a top surface of the conductive layer. The third diffusion barrier layer covers a side wall of the first diffusion barrier layer located outside the contact hole, a side wall of the conductive layer located outside the contact hole, and a side wall of the second diffusion barrier layer located outside the contact hole. BRIEF DESCRIPTION OF THE DRAWINGS One or more embodiments are exemplary illustrated by the figures in the drawings corresponding to each of the embodiments, and these exemplary illustrations do not constitute a limitation to the embodiments. Elements having the same reference symbols in the drawings represent similar elements, and the figures in the drawings do not constitute a limitation to a scale unless otherwise stated. In order to more clearly illustrate the technical solution in the embodiments of the disclosure or in the related art, the drawings used in the embodiments will be briefly described below. It will be apparent that the drawings described below are only some embodiments of the disclosure, and for those skilled in the art, other drawings may be obtained according to these drawings without creative labor. FIG. 1 to FIG. 11 are schematic partial cross-sectional diagrams corresponding to operations of a method for manufacturing a semiconductor structure according to an embodiment of the disclosure. DETAILED DESCRIPTION Embodiments of the disclosure provide a semiconductor structure and a method for manufacturing a semiconductor structure. In the method for manufacturing the semiconductor structure, a direction from a base to a target contact structure is a first direction. Herein, a groove exposes a side wall, extending along the first direction, of an initial contact structure located outside a contact hole, and a