US-12622245-B2 - Ion implant process for defect elimination in metal layer planarization

Abstract

The present disclosure describes a method for the planarization of ruthenium metal layers in conductive structures. The method includes forming a first conductive structure on a second conductive structure, where forming the first conductive structure includes forming openings in a dielectric layer disposed on the second conductive structure and depositing a ruthenium metal in the openings to overfill the openings. The formation of the first conductive structure includes doping the ruthenium metal and polishing the doped ruthenium metal to form the first conductive structure.

Inventors

• Chia-Cheng Chen
• Huicheng Chang
• Fu-Ming HUANG
• Kei-Wei Chen
• Liang-Yin Chen
• Tang-Kuei Chang
• Yee-Chia Yeo
• WEI-WEI LIANG
• Ji Cui

Assignees

• TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Dates

Publication Date

20260505

Application Date

20220727

Claims (20)

1. 1 . A method, comprising: forming an opening in a dielectric layer disposed on a substrate; forming a ruthenium metal structure in the opening; doping the ruthenium metal structure and the dielectric layer with a dopant via an implant process; and polishing the doped ruthenium metal structure and the doped dielectric layer.
2. 2 . The method of claim 1 , wherein forming the ruthenium metal structure comprises depositing a ruthenium metal liner in the opening and on top surfaces of the dielectric layer outside the opening.
3. 3 . The method of claim 1 , wherein forming the ruthenium metal structure comprises depositing a ruthenium metal in the opening to overfill the opening.
4. 4 . The method of claim 1 , wherein polishing the doped ruthenium metal structure and the dielectric layer comprises removing the doped ruthenium metal structure and the dielectric layer at a substantially same polishing rate.
5. 5 . The method of claim 1 , wherein doping the ruthenium metal structure and the dielectric layer comprises implanting a top portion of the ruthenium metal structure and a top portion of the dielectric layer with the dopant.
6. 6 . The method of claim 1 , wherein doping the ruthenium metal structure and the dielectric layer comprises implanting the ruthenium metal structure and the dielectric layer with carbon (C), boron (B), phosphorous (P), oxygen (O), silicon (Si), argon (Ar), germanium (Ge), arsenic (As), or xenon (Xe).
7. 7 . The method of claim 1 , wherein doping the ruthenium metal structure and the dielectric layer comprises implanting the ruthenium metal structure and the dielectric layer with an ion beam having an incident angle between about 0° and about 80°.
8. 8 . The method of claim 1 , wherein doping the ruthenium metal structure and the dielectric layer comprises implanting the ruthenium metal structure and the dielectric layer with dopants having an ion energy between about 0.3 keV and about 20 keV.
9. 9 . A method, comprising: forming an opening in a dielectric layer disposed on a substrate; forming a ruthenium metal structure in the opening, wherein the ruthenium metal structure is in contact with the dielectric layer; doping a portion of the ruthenium metal structure and a portion of the dielectric layer with a dopant via an implant process; and removing the doped portion of the ruthenium metal structure and the doped portion of the dielectric layer.
10. 10 . The method of claim 9 , wherein forming the ruthenium metal structure comprises depositing a ruthenium metal liner in the opening and on top surfaces of the dielectric layer outside the opening.
11. 11 . The method of claim 9 , wherein forming the ruthenium metal structure comprises filling the opening with a ruthenium metal and forming an overburden with the ruthenium metal on surfaces of the dielectric layer outside the opening.
12. 12 . The method of claim 9 , wherein removing the doped portion of the ruthenium metal structure and the doped portion of the dielectric layer comprises polishing the dielectric layer and the doped ruthenium metal structure at a substantially same polishing rate.
13. 13 . The method of claim 9 , wherein doping the portion of the ruthenium metal structure comprises implanting a top portion of the ruthenium metal structure with carbon (C), boron (B), phosphorous (P), oxygen (O), silicon (Si), argon (Ar), germanium (Ge), arsenic (As), or xenon (Xe).
14. 14 . The method of claim 9 , wherein doping the portion of the ruthenium metal structure comprises implanting a top portion of the ruthenium metal structure to form a top doped portion and a bottom non-doped portion.
15. 15 . The method of claim 9 , wherein doping the portion of the ruthenium metal structure comprises increasing a polishing rate of the doped portion of the ruthenium metal structure by about 1.1 to about 1.7 times.
16. 16 . A method, comprising: forming a plurality of openings extending through a dielectric layer; forming a ruthenium metal structure in the plurality of openings and on the dielectric layer; doping the ruthenium metal structure and the dielectric layer with a dopant via an implant process; and removing a portion of the doped ruthenium metal structure and a portion of the doped dielectric layer.
17. 17 . The method of claim 16 , wherein removing the portion of the doped ruthenium metal structure and the portion of the doped dielectric layer comprises polishing the doped dielectric layer and the doped ruthenium metal structure at a substantially same polishing rate.
18. 18 . The method of claim 16 , wherein doping the ruthenium metal structure and the dielectric layer comprises implanting a top portion of the ruthenium metal structure and the dielectric layer with carbon (C), boron (B), phosphorous (P), oxygen (O), silicon (Si), argon (Ar), germanium (Ge), arsenic (As), or xenon (Xe).
19. 19 . The method of claim 16 , wherein doping the ruthenium metal structure comprises implanting a top portion of the ruthenium metal structure to form a top doped portion and a bottom non-doped portion.
20. 20 . The method of claim 16 , wherein doping the ruthenium metal structure comprises increasing a polishing rate of the doped ruthenium metal structure by about 1.1 to about 1.7 times.

Description

CROSS-REFERENCE TO RELATED APPLICATION This application is a continuation of U.S. Non-Provisional patent application Ser. No. 16/997,616, filed on Aug. 19, 2020, titled “Ion implant Process for Defect Elimination in Metal Layer Planarization,” which claims the benefit of U.S. Provisional Patent Application No. 63/002,291, filed on Mar. 30, 2020 and titled “Ion Implant Process for Defect Elimination in Metal Layer Planarization.” The aforementioned applications are incorporated herein by reference in their entireties. BACKGROUND Chemical mechanical polishing or planarization (CMP) is a process for smoothing and planarizing surfaces with a combination of chemical and mechanical forces. CMP uses an abrasive chemical slurry in conjunction with a polishing pad and a retaining ring. In semiconductor fabrication, CMP is used to planarize and polish different types of materials (e.g., dielectrics, metals, and semiconductors) having a crystalline, polycrystalline, or amorphous microstructures. BRIEF DESCRIPTION OF THE DRAWINGS Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. FIG. 1 is a cross-sectional view of metallization layer openings, in accordance with some embodiments. FIG. 2 is a flowchart of a method describing various operations for the formation of conductive structures in an interconnect layer, in accordance with some embodiments. FIGS. 3-8 are cross-sectional views of intermediate structures during the formation of conductive structures in an interconnect layer, in accordance with some embodiments. FIG. 9 is a cross-sectional view of a structure with conductive structures thereon, in accordance with some embodiments. FIG. 10 is a flowchart of a method describing various operations for the formation of conductive structures, in accordance with some embodiments. FIGS. 11-15 are cross-sectional views of intermediate structures during the formation of conductive structures, in accordance with some embodiments. DETAILED DESCRIPTION The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are disposed between the first and second features, such that the first and second features are not in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition does not in itself dictate a relationship between the various embodiments and/or configurations discussed. Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly. The term “nominal” as used herein refers to a desired, or target, value of a characteristic or parameter for a component or a process operation, set during the design phase of a product or a process, together with a range of values above and/or below the desired value. The range of values can be due to slight variations in manufacturing processes and/or tolerances. In some embodiments, the terms “about” and “substantially” can indicate a value of a given quantity that varies within 5% of the value (e.g., ±1%, ±2%, ±3%, ±4%, ±5% of the value). These values are merely examples and are not intended to be limiting. It is to be understood that the terms “about” and “substantially” can refer to a percentage of the values as interpreted by those skilled in relevant art(s) in light of the teachings herein. Ruthenium metal can be used as a fill material for conductive structures in a middle-end-of-line (MEOL) process and a diffusion barrier/seed layer for copper interconnects in a back-end-of-line (BEOL) process. This is because ruthenium metal exhibits low bulk resistivity (e.g., about 7.7 μΩ·cm) and sufficient corrosion resistance to copper plating chemistries. Integration of ruthenium in semiconductor manufacturing has its challenges. For example, ruthenium, which is resistant to chemical attack, is difficult to planarize (e.g., exhibits a low polishing rate) with existing chemical mechanical polish