US-12622264-B2 - Three-dimensional metal-insulator-metal (MIM) capacitors and trenches

Abstract

A method for making a three dimensional (3D) Metal-Insulator-Metal (MIM) capacitor and trenches by etching a dielectric layer to form a via or contact hole, a tub, and a trench in the dielectric layer; depositing conformal metal in the via or contact hole, the tub, and the trench, wherein the deposited conformal metal forms bottom and sidewall portions of a 3D bottom electrode of a metal-insulator-metal (MIM) capacitor in the tub, and wherein the deposited conformal metal forms a via or contact in the via or contact hole; removing conformal metal and at least a portion of the dielectric layer from a lip of the tub; depositing an insulator layer on the 3D bottom electrode to form an insulator layer of the MIM capacitor; and depositing a metal layer on the insulator layer to form a top electrode of the MIM capacitor.

Inventors

• Yaojian Leng

Assignees

• MICROCHIP TECHNOLOGY INCORPORATED

Dates

Publication Date

20260505

Application Date

20230201

Claims (20)

1. 1 . A device comprising: a three-dimensional metal-insulator-metal (MIM) capacitor comprising: a three-dimensional bottom electrode in a dielectric layer; a top electrode; and an insulator layer between the top electrode and the three-dimensional bottom electrode; a trench in the dielectric layer around a perimeter of the three-dimensional MIM capacitor; a Mx metal layer or silicided poly layer electrically connected to the three-dimensional bottom electrode; an Mx+1 metal layer or M1 metal layer comprising the top electrode; and a metal pad electrically connected to the Mx metal layer or silicided poly layer through a via or contact, respectively, wherein a height of the three-dimensional bottom electrode is smaller than a height of the via or contact.
2. 2 . The device of claim 1 , wherein a difference between the height of the three-dimensional bottom electrode and the height of the via or contact is between about 0.1 μm and about 0.5 μm.
3. 3 . The device of claim 1 , wherein the insulator layer has a substantially uniform thickness between the three-dimensional bottom electrode and the top electrode.
4. 4 . The device of claim 1 , comprising a portion of the dielectric layer between the trench and the three-dimensional MIM capacitor.
5. 5 . The device of claim 4 , wherein the portion of the dielectric layer extends entirely around a perimeter of the three-dimensional MIM capacitor, and wherein the trench extends entirely around a perimeter of the portion of the dielectric layer.
6. 6 . The device of claim 1 , wherein the Mx metal layer or silicided poly layer comprises a metal.
7. 7 . The device of claim 1 , wherein the Mx metal layer or silicided poly layer comprises a silicided poly layer.
8. 8 . The device of claim 1 , wherein the three-dimensional bottom electrode comprises tungsten.
9. 9 . The device of claim 1 , wherein the via or contact comprises tungsten.
10. 10 . A device comprising: a three-dimensional metal-insulator-metal (MIM) capacitor comprising: a three-dimensional bottom electrode in a dielectric layer; a top electrode; and an insulator layer between the top electrode and the three-dimensional bottom electrode; a trench in the dielectric layer around a perimeter of the three-dimensional MIM capacitor an Mx metal layer or silicided poly layer electrically connected to the three-dimensional bottom electrode; an Mx+1 metal layer or M1 metal layer comprising the top electrode; and a metal pad electrically connected to the Mx metal layer or silicided poly layer through a trench connection, respectively, wherein a height of the three-dimensional bottom electrode is smaller than a height of the trench connection.
11. 11 . A device comprising: a three-dimensional metal-insulator-metal (MIM) capacitor in a dielectric layer, the MIM capacitor comprising: a tub-shaped bottom electrode in a dielectric layer; a top electrode; and an insulator layer between the top electrode and the tub-shaped bottom electrode; a trench in the dielectric layer around a perimeter of the three-dimensional MIM capacitor; a Mx metal layer or silicided poly layer electrically connected to the tub-shaped bottom electrode; and an Mx+1 metal layer or M1 metal layer comprising the top electrode, wherein a height of the tub-shaped bottom electrode is smaller than a height of the dielectric layer.
12. 12 . The device of claim 11 , wherein a difference between the height of the tub-shaped bottom electrode and the height of the dielectric layer is between about 0.1 μm and about 0.5 μm.
13. 13 . The device of claim 11 , wherein the insulator layer has a substantially uniform thickness between the tub-shaped bottom electrode and the top electrode.
14. 14 . The device of claim 11 , comprising a portion of the dielectric layer between the trench and the three-dimensional MIM capacitor.
15. 15 . The device of claim 14 , wherein the portion of the dielectric layer extends entirely around a perimeter of the three-dimensional MIM capacitor, and wherein the trench extends entirely around a perimeter of the portion of the dielectric layer.
16. 16 . The device of claim 11 , wherein the Mx metal layer or silicided poly layer comprises a metal or a silicided poly layer.
17. 17 . The device of claim 11 , wherein the tub-shaped bottom electrode comprises tungsten.
18. 18 . The device of claim 1 , wherein the trench is a segmented trench.
19. 19 . The device of claim 11 , wherein the trench is a segmented trench.
20. 20 . The device of claim 10 , wherein the trench is a segmented trench.

Description

RELATED PATENT APPLICATIONS This application claims priority to commonly owned U.S. Patent Application No. 63/426,292 filed Nov. 17, 2022, the entire contents of which are hereby incorporated by reference for all purposes. TECHNICAL FIELD The present disclosure relates to metal-insulator-metal (MIM) capacitors in, for example, analog/mixed signal/RF-CMOS circuits, and more particularly, to a three-dimensional (3D) MIM capacitor. BACKGROUND A metal-insulator-metal (MIM) capacitor is a capacitor constructed with a metal top electrode, a metal bottom electrode, and an insulator (dielectric) sandwiched between the two metal electrodes. The electrodes may be in the form of plates. MIM capacitors are important components in many electrical circuits, for example many analog, mixed-signal, and radio-frequency complementary metal-oxide semiconductors (RF CMOS) circuits. MIM capacitors may offer better performance over other alternatives due to lower resistance, better matching, and better Signal/Noise ratio. For example, MIM capacitors may offer better performance than POP (Poly-Oxide-Poly) capacitors and MOM (Metal-Oxide-Metal Lateral Flux) capacitor. MIM capacitors are typically provided built just below the top metal layer, for example, using the existing Top-1 Metal layer as the bottom electrode, constructing a top electrode with a different metal (e.g., Titanium or Titanium Nitride (Ti/TiN), Tantalum or Tantalum Nitride (Ta/TaN), or Tungsten (W)), and connecting an overlying Top Metal layer to the top and bottom electrodes of the capacitor through respective interconnect structures. The top electrode typically has a higher resistance than the bottom electrode, e.g., because the top electrode may be limited by thickness constraints and the material of choice for integration, thus limiting the performance of conventional MIM capacitors. Conventional MIM capacitors can be built either with aluminum interconnect structures or with copper interconnect structures. The MIM capacitors include an insulator layer formed between a bottom electrode (typically using one existing interconnect layer, either aluminum or copper) and a metal top electrode (typically an additional metal layer inserted between two existing interconnect metal layers, with metal such as Ti, TiN, Ta, or TaN). The metal bottom electrode and metal top electrode are each connected to a respective connection pad by one or more vias. The insulator layer may be a SiN layer having a thickness of about 500 Å, for example. As used herein, a “via” is a connection between two metal layers, and a “contact” is a connection between a poly/active layer and M1. A contact or via may be formed by plugging or otherwise depositing a conformal conductive material (e.g., tungsten) in a via or contact hole having a small diameter or width, e.g., a diameter or width below 1 μm, and thus having a relatively large resistance, e.g., a resistance of at least 1 ohm per via. For example, conventional vias or contacts typically have a small diameter in the range of 0.1 μm to 0.5 μm, and may have a resistance of about 10 ohms/via, for example, especially for vias or contacts formed from tungsten or other highly resistive material. Thus, conventional MIM capacitors often include multiple vias or contacts (e.g., multiple vias or contacts between the top electrode and top electrode pad and/or multiple vias or contacts between the bottom electrode and bottom electrode pad) to reduce the overall resistance to some extent. As used herein, a “via” or “contact” in the context of an MIM capacitor refers to a via or contact extending from a capacitor electrode (top electrode or bottom electrode) to an overlying conductive pad. In addition, MIM capacitors are typically expensive to build, e.g., as compared with other certain types of capacitors. For example, MIM capacitors typically require additional mask layers and many additional process steps, as compared with POP capacitors and MOM capacitors. MIM capacitors also typically use relatively large areas of silicon, resulting in inefficient area usage, particularly with large MIM capacitors. Further, in a conventional MIM capacitor, the top electrode is thin and thus provides a high series resistance, as the vertical thickness of the top electrode is limited by the vertical distance between the adjacent metal layers in which the MIM capacitor is formed, (e.g., top metal layer and top-1 metal layer). As described above, a conventional MIM capacitor may be constructed with a top electrode, a bottom electrode, and an insulator (dielectric) sandwiched in-between, hence a Metal-Insulator-Metal (MIM) capacitor. A MIM capacitor includes an insulator layer formed between a bottom electrode (Mx Metal layer) and a metal top electrode. The bottom electrode and metal top electrode are each connected to a respective pad (Mx+1 top metal layer) by one or more vias. Typically, MIM capacitors may be built with an additional mask layer to define the top electr