US-12622266-B2 - Die level cavity heat sink
Abstract
A die level cavity heat sink that can be used within current and emerging packaging technologies to improve die level thermal performance within the package. Alternatively, or in addition, selective heat sink elements are provided to further manage thermal performance within a package by providing thermal pads from the interior of the package to a surface of a mold cap where additional thermal cooling mechanisms can be utilized to further remove heat from the package area.
Inventors
- Alan P. Boone
- Kaitlyn M. Fisher
- Jacob R. Mauermann
Assignees
- BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC.
Dates
- Publication Date
- 20260505
- Application Date
- 20211123
Claims (16)
- 1 . An electronic systems package comprising: at least one die in operable communication with a substrate; a heat sink defining a cavity containing the at least one die therein, the heat sink carried by the substrate; and wherein the heat sink is operable to direct heat generated from the at least one die into the substrate.
- 2 . The package of claim 1 further comprising: a first thermal interface material layer between the heat sink and the substrate; and a second thermal interface material layer between the heat sink and the at least one die.
- 3 . The package of claim 1 wherein the at least one die further comprises: a flip chip die.
- 4 . The package of claim 3 further comprising: a second substrate above the heat sink; wherein the heat sink is further operable to direct heat generated from the at least one die into the second substrate.
- 5 . The package of claim 4 further comprising: a second die above the second substrate and in operable communication therewith.
- 6 . The package of claim 5 wherein the second die further comprises: one of a flip chip die and a wire bond die.
- 7 . The package of claim 5 further comprising: an encapsulant layer surrounding the second die.
- 8 . The package of claim 7 wherein heat generated from the second die is dispersed into the encapsulant layer.
- 9 . The package of claim 7 further comprising: one or more selective heat sinks within the encapsulant layer surrounding the second die.
- 10 . The package of claim 9 wherein heat generated from the second die is dispersed into the one or more selective heat sinks and out of the encapsulant layer.
- 11 . The package of claim 1 wherein the heat sink further comprises: a thermal interface surface surrounding the die; and a thermal interface material layer between the thermal interface surface and the substrate.
- 12 . The package of claim 1 wherein the heat sink is a first heat sink, the package further comprising: a second heat sink extending over the first heat sink and in thermal communication therewith; and a thermal interface material layer between the first heat sink and the second heat sink.
- 13 . A method of dispersing heat comprising: generating heat with at least one die contained in an electronic systems package; absorbing at least a portion of the heat generated by the at least one die with a heat sink defining a cavity containing the at least one die therein; directing the portion of the heat from the heat sink through a thermal interface surface to a substrate carrying the heat sink thereon; and dispersing the portion of the heat away from the die.
- 14 . The method of claim 13 further comprising: directing at least part of the portion of the heat to the substrate carrying the heat sink; and directing at least another part of the portion of the heat to a second substrate above the heat sink and in thermal connection therewith.
- 15 . A method of dispersing heat comprising: enclosing a first die carried on a first substrate of an electronics system package in a first heat sink defining a cavity, the cavity containing the first die therein; generating heat with the first die; generating heat with a second die carried by a second substrate above the first heat sink and in thermal communication therewith; absorbing at least a portion of the heat generated by the first die with the first heat sink; absorbing at least a portion of the heat generated by the second die with a second heat sink within an encapsulant layer surrounding the second die; and directing the portion of heat from the first die and the portion of the heat from the second die away from the first and second dies.
- 16 . The method of claim 15 wherein directing the portion of heat away from the first and second dies further comprises: directing a first part of the portion of the heat from the first die to the first substrate; directing a second part of the portion of the heat from the first die to the second substrate and into the second heat sink; and dissipating the second part of the portion of heat from the first die and the portion of the heat from the second die from the second heat sink and away from the first and second dies.
Description
TECHNICAL FIELD The present disclosure relates to electronic systems packaging. More particularly, in one example, the present disclosure relates to thermal dissipation techniques and technologies for electronic systems packaging. Specifically, in another example, the present disclosure relates to integrated circuit packaging technologies with improved thermal dissipation performance. BACKGROUND Electronic systems technology is a rapidly evolving field with a push towards microelectronics that is driven by enhanced performance and miniaturization. In particular, there is a desire for electronic systems to be reduced in size to smaller and more compact packaging. Accordingly, the field of microelectronics is generally focused on creating the smallest form factor to fit into the smallest package while providing consistent or improved electronic performance. It is common that these functional electronic systems are contained in a single package, such as a System in Package (SiP), or incorporated into a single integrated circuit known as a System in Chip package (SiC). As technology improves, the increased performance of electronic systems circuits and other components, coupled with the reduction in size and the nature of both packaging approaches, creates thermal loads that tend to exceed the capability of the traditional package thermal dissipation techniques and/or technologies. In particular, the higher performance requirements of the electronic components in modern electronic systems drive localized thermal loads at the individual integrated circuits, which may create excess buildup of localized heat that surpasses the temperature rating of the devices. This in turn can cause degradation of the performance of the integrated circuits and/or premature failure. Further, the focus on reducing the size and weight limitations of current SiP and SiC packaging technologies coupled with the increased performance of the electronics systems contained therein further compound the limited ability to control thermal performance. SUMMARY The present disclosure addresses these and other issues by providing, in one aspect, a die level cavity heat sink that can be used within current and emerging packaging technologies to improve die level thermal performance within the package. Alternatively, or in addition, selective heat sink elements are provided to further manage thermal performance within a package by providing thermal pads from the interior of the package to a surface of a mold cap where additional thermal cooling mechanisms can be utilized to further remove heat from the package area. In one aspect, an exemplary embodiment of the present disclosure may provide an electronic systems package comprising: at least one die in operable communication with a substrate; a heat sink defining a cavity containing the at least one die therein, the heat sink carried by the substrate; and wherein the heat sink is operable to direct heat generated from the at least one die into the substrate. This exemplary embodiment or another exemplary embodiment may further provide a first thermal interface material layer between the heat sink and the substrate; and a second thermal interface material layer between the heat sink and the at least one die. This exemplary embodiment or another exemplary embodiment may further provide wherein the at least one die further comprises: a flip chip die. This exemplary embodiment or another exemplary embodiment may further provide a second substrate above the heat sink; wherein the heat sink is further operable to direct heat generated from the at least one die into the second substrate. This exemplary embodiment or another exemplary embodiment may further provide a second die above the second substrate and in operable communication therewith. This exemplary embodiment or another exemplary embodiment may further provide wherein the second die further comprises: one of a flip chip die and a wire bond die. This exemplary embodiment or another exemplary embodiment may further provide an encapsulant layer surrounding the second die. This exemplary embodiment or another exemplary embodiment may further provide wherein heat generated from the second die is dispersed into the encapsulant layer. This exemplary embodiment or another exemplary embodiment may further provide one or more selective heat sinks within the encapsulant layer surrounding the second die. This exemplary embodiment or another exemplary embodiment may further provide wherein heat generated from the second die is dispersed into the one or more selective heat sinks and out of the encapsulant layer. This exemplary embodiment or another exemplary embodiment may further provide wherein the heat sink further comprises: a thermal interface surface surrounding the die; and a thermal interface material layer between the thermal interface surface and the substrate. This exemplary embodiment or another exemplary embodiment may further provide wherein th