US-12622272-B1 - Two-sided liquid cooling

US12622272B1US 12622272 B1US12622272 B1US 12622272B1US-12622272-B1

Abstract

Embodiments herein provide for an integrated cooling assembly and methods of forming the same. The integrated cooling assembly comprises an interposer, a plurality of semiconductor devices, a first cold plate, and at least one second cold plate. The interposer has a first side and a second side opposite the first side. The plurality of semiconductor devices are attached to the first side of the interposer. A first cold plate is attached to at least one of the plurality of first semiconductor devices. At least one second cold plate is attached to the second side of the interposer.

Inventors

Rasit Onur Topaloglu
Belgacem Haba

Assignees

ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

Dates

Publication Date: 20260505
Application Date: 20250407

Claims (20)

1 . An integrated cooling assembly comprising: an interposer having a first side and a second side opposite the first side; a plurality of semiconductor devices attached to the first side of the interposer; a first cold plate attached to at least one semiconductor device of the plurality of semiconductor devices; and at least one second cold plate attached to the second side of the interposer, wherein each of the first and second cold plates comprises one or more coolant channels.
2 . The integrated cooling assembly of claim 1 , wherein: at least one coolant channel of the first cold plate is fluidly coupled to at least one coolant channel of a second cold plate by a spacer; and a first adhesive layer is between the spacer and the first cold plate; and a second adhesive layer is between the spacer and the second cold plate.
3 . The integrated cooling assembly of claim 1 , wherein: at least one coolant channel of the first cold plate is fluidly coupled to at least one coolant channel of a second cold plate through the interposer; and the interposer is physically coupled to the first cold plate and the at least one second cold plate by spacers.
4 . The integrated cooling assembly of claim 1 , wherein: the at least one semiconductor device of the plurality of semiconductor devices comprises one or more pass-through power TSVs; and the first cold plate comprises one or more electrical connections.
5 . The integrated cooling assembly of claim 1 , wherein the at least one second cold plate is directly bonded to the interposer.
6 . The integrated cooling assembly of claim 1 , further comprising: a substrate having at least one opening on a first side of the substrate, wherein: the interposer is attached to the first side of the substrate; and the at least one second cold plate is disposed in the at least one opening of the substrate.
7 . The integrated cooling assembly of claim 6 , wherein: the interposer is attached to the substrate in a central portion of the second side of the interposer.
8 . The integrated cooling assembly of claim 6 , wherein: the plurality of semiconductor devices are disposed on a central portion of a first side of the interposer; and the interposer is attached to the substrate in a peripheral portion of the second side of the interposer.
9 . The integrated cooling assembly of claim 1 , wherein: the plurality of semiconductor devices are a plurality of first semiconductor devices; the plurality of first semiconductor devices are attached to the first side of the interposer; the first cold plate is attached to at least one first semiconductor device of the plurality of first semiconductor devices; and the integrated cooling assembly further comprises: a plurality of second semiconductor devices attached to the second side of the interposer; and the at least one second cold plate is attached to at least one second semiconductor device of the plurality of second semiconductor devices.
10 . The integrated cooling assembly of claim 9 , wherein the at least one second semiconductor device of the plurality of the second semiconductor devices is an XPU, a dummy chip, or an HBM.
11 . The integrated cooling assembly of claim 9 , wherein: the first semiconductor devices are disposed on a central portion of the first side of the interposer; the interposer is attached to a substrate in a peripheral portion of a second side of the interposer; at least one coolant channel of the first cold plate is fluidly coupled to at least one coolant channel of the at least one second cold plate through the interposer; the at least one coolant channel of the first cold plate is disposed over at least a portion of a backside of each first semiconductor device of the plurality of first semiconductor devices; and the at least one coolant channel of the at least one second cold plate is disposed over at least a portion of a backside of each second semiconductor device of the plurality of second semiconductor devices.
12 . The integrated cooling assembly of claim 9 , wherein: the first cold plate is directly bonded to the at least one first semiconductor device; and the at least one second cold plate is directly bonded to the at least one second semiconductor device.
13 . The integrated cooling assembly of claim 9 , wherein at least one coolant channel of the first cold plate or the second cold plate is exposed to a portion of a backside of at least one first semiconductor device or a portion of a backside of the at least one second semiconductor device.
14 . The integrated cooling assembly of claim 9 , wherein at least one coolant channel of the first cold plate or the at least one second cold plate is positioned across a first semiconductor device or a second semiconductor device and the at least one coolant channel is not exposed to at least a portion of a backside of the first semiconductor device or at least a portion of a backside of the second semiconductor device.
15 . A method comprising: providing an interposer having a first side and a second side opposite the first side, wherein a plurality of semiconductor devices are attached to the first side of the interposer; directly bonding a first cold plate to at least one semiconductor device of the plurality of semiconductor devices; and attaching at least one second cold plate to the second side of the interposer, wherein each of the first and second cold plates comprises one or more coolant channels.
16 . The method of claim 15 , wherein the attaching the at least one second cold plate comprises directly bonding the at least one second cold plate to the interposer.
17 . The method of claim 15 , wherein: the plurality of semiconductor devices are a plurality of first semiconductor devices; the plurality of first semiconductor devices are attached to the first side of the interposer; the first cold plate is directly bonded to at least one first semiconductor device of the plurality of first semiconductor devices; a plurality of second semiconductor devices are attached to the second side of the interposer; and attaching the at least one second cold plate to the second side of the interposer comprises: directly bonding the at least one second cold plate to at least one second semiconductor device of the plurality of second semiconductor devices.
18 . The method of claim 15 , wherein: the providing the interposer comprises forming an opening through the interposer; and the method further comprises coupling at least one coolant channel of the first cold plate to at least one coolant channel of a second cold plate using a first spacer between the interposer and the first cold plate and using a second spacer between the interposer and the second cold plate.
19 . The method of claim 15 , further comprising: providing a spacer material; and attaching the first cold plate to the second cold plate using adhesive between the spacer material and portions of the first cold plate and the second cold plate.
20 . The method of claim 15 , further comprising attaching the interposer to a substrate.

Description

FIELD The present disclosure relates to advanced packaging for microelectronic devices, and in particular, cooling systems for device packages and methods of manufacturing the same. BACKGROUND Energy consumption poses a critical challenge for the future of large-scale computing as the world's computing energy requirements are rising at a rate that most would consider unsustainable. Some models predict that the information, communication and technology (ICT) ecosystem could exceed 20% of global electricity use by 2030, with direct electrical consumption by large-scale computing centers accounting for more than one-third of that energy usage. A significant portion of the energy used by such large-scale computing centers is devoted to cooling, since even small increases in operating temperatures can negatively impact the performance of microprocessors, memory devices, and other electronic components. While some of this energy is expended to operate the cooling systems that are directly cooling the chips (e.g., heat spreaders, heat pipes, etc.), energy consumption/costs for indirect cooling can also be quite staggering. Indirect cooling energy costs include, for example, cooling or air conditioning of data center buildings. Data center buildings can house thousands, to tens of thousands or more, of high performance chips in server racks, and each of those high performance chips is a heat source. An uncontrolled ambient temperature in a data center will adversely affect the performance of the individual chips, and the data center system performance as a whole. Thermal dissipation in high-power density chips (semiconductor devices/die) is also a critical challenge as improvements in chip performance, e.g., through increased gate or transistor density due to advanced processing nodes, evolution of multi-core microprocessors, etc., have resulted in increased power density and a corresponding increase in thermal flux that contributes to elevated chip temperatures. Higher density of transistors also increases the length of metal wiring on the chips, which generates its own additional thermal flux due to Joule heating of these wires due to higher currents. These elevated temperatures are undesirable as they can degrade the chip's operating performance, efficiency, reliability, and amount of remaining life. Cooling systems used to maintain the chip at a desired operating temperature typically remove heat using one or more heat dissipation devices, e.g., thermal spreaders, heat pipes, cold plates, liquid cooled heat pipe systems, thermal-electric coolers, heat sinks, etc. One or more thermal interface materials (TIMs), such as, for example, thermal paste, thermal adhesive, or thermal gap filler, may be used to facilitate heat transfer between the surfaces of a chip and heat dissipation device(s). A thermal interface material is any material that is inserted between two components to enhance the thermal coupling therebetween. Unfortunately, the combined thermal resistance of (i) the interfacial boundary regions between one or more TIMs and the chip and/or the heat dissipation device(s), and (ii) the thermal interface material itself can inhibit heat transfer from the chip to the heat dissipation devices, undesirably reducing the cooling efficiency of the cooling system. Generally speaking, there are multiple components between the heat dissipating sources (i.e., active circuitry) in the chips and the heat dissipation devices, each of which contributes to the system thermal resistance cumulatively along the heat transfer paths and raises chip junction temperatures from the ambient. Such cooling systems can suffer from reduced cooling efficiency due to the design and manufacture of system components. Accordingly, there exists a need in the art for improved energy-efficient cooling systems, by reducing system thermal resistance, and methods of manufacturing the same. SUMMARY Embodiments herein provide for placing semiconductor devices (e.g., one or more GPUs, GPU cores, XPUs, HBMs, DRAM stacks, etc.) on one or both sides of an interposer with liquid cooling on both sides of the interposer. Advantageously, an interconnect distance can be shortened between the semiconductor devices (e.g., GPU cores and HBMs) and thermal issues can be reduced. A first general aspect includes an integrated cooling assembly comprising an interposer, a plurality of semiconductor devices, a first cold plate, and at least one second cold plate. The interposer has a first side and a second side opposite the first side. At least one semiconductor device of the plurality of semiconductor devices is attached to the first side of the interposer. A first cold plate is attached to at least one of the plurality of semiconductor devices. At least one second cold plate is attached to the second side of the interposer. In some embodiments, at least one coolant channel of the first cold plate is coupled to at least one coolant channel of the at least one secon