US-12622273-B2 - Fan-out type semiconductor package and method of manufacturing the same

Abstract

A fan-out type semiconductor package is provided and may include: a package substrate; an interposer on an upper surface of the package substrate, the interposer including upper pads and lower pads electrically connected with the upper pads; conductive bumps between the package substrate and the lower pads of the interposer and electrically connecting the package substrate with the interposer; a semiconductor chip on a central portion of an upper surface of the interposer and electrically connected with the upper pads of the interposer; a molding member on an edge portion of the upper surface of the interposer, the molding member including an upper surface coplanar with an upper surface of the semiconductor chip; and a metal pillar structure vertically extending from the upper surface of the molding member to a lower surface of the interposer and configured to individually make contact with the lower pads of the interposer.

Inventors

• Joonho JUN
• Sangsick Park
• Chungsun Lee
• Hyoungjoo Lee

Assignees

• SAMSUNG ELECTRONICS CO., LTD.

Dates

Publication Date

20260505

Application Date

20221221

Priority Date

20220624

Claims (16)

1. 1 . A fan-out type semiconductor package comprising: a package substrate; an interposer on an upper surface of the package substrate, the interposer comprising upper pads and lower pads electrically connected with the upper pads; conductive bumps between the package substrate and the lower pads of the interposer and electrically connecting the package substrate with the interposer; a semiconductor chip on a central portion of an upper surface of the interposer and electrically connected with the upper pads of the interposer, the semiconductor chip having a width narrower than a width of the interposer; a molding member on an edge portion of the upper surface of the interposer such as to surround side surfaces of the semiconductor chip, the molding member comprising an upper surface coplanar with an upper surface of the semiconductor chip; and at least one metal pillar structure vertically extending from the upper surface of the molding member to a lower surface of the interposer and configured to individually make contact with at least one of the lower pads of the interposer, the at least one metal pillar structure having a width that is equal to or greater than a width of the at least one of the lower pads of the interposer.
2. 2 . The fan-out type semiconductor package of claim 1 , wherein the at least one metal pillar structure comprises a plurality of metal pillar structures comprising: an inner pillar surrounding the semiconductor chip in at least a first horizontal direction and a second horizontal direction, opposite to the first horizontal direction; and at least one outer pillar surrounding the inner pillar in at least the first horizontal direction and the second horizontal direction.
3. 3 . The fan-out type semiconductor package of claim 1 , wherein the at least one metal pillar structure comprises a plurality of metal pillar structures comprising a pillar array having a pitch that is the same as a pitch between the lower pads of the interposer.
4. 4 . The fan-out type semiconductor package of claim 1 , wherein the at least one metal pillar structure comprises a plurality of metal pillar structures comprising: at least one first pillar extending parallel to opposite side surfaces among the side surfaces of the semiconductor chip; and at least one second pillar extending perpendicular to the at least one first pillar.
5. 5 . A fan-out type semiconductor package comprising: a package substrate; an interposer on an upper surface of the package substrate, the interposer comprising upper pads and lower pads electrically connected with the upper pads; conductive bumps between the package substrate and the lower pads of the interposer and electrically connecting the package substrate with the interposer; a semiconductor chip on a central portion of an upper surface of the interposer and electrically connected with the upper pads of the interposer, the semiconductor chip having a width narrower than a width of the interposer; a molding member on an edge portion of the upper surface of the interposer such as to surround side surfaces of the semiconductor chip, the molding member comprising an upper surface coplanar with an upper surface of the semiconductor chip; and at least one pillar structure in the molding member, the at least one pillar structure comprising a material having a thermal conductivity higher than a thermal conductivity of the molding member, wherein the at least one pillar structure vertically extends from the upper surface of the molding member to a lower surface of the interposer.
6. 6 . The fan-out type semiconductor package of claim 5 , wherein the at least one pillar structure makes contact with at least one of the lower pads of the interposer.
7. 7 . The fan-out type semiconductor package of claim 6 , wherein the at least one pillar structure comprises a plurality of pillar structures, and the plurality of pillar structures are configured to individually make contact with the lower pads of the interposer.
8. 8 . The fan-out type semiconductor package of claim 7 , wherein the at least one pillar structure has a width area that is equal to or greater than a width of each of the lower pads of the interposer.
9. 9 . The fan-out type semiconductor package of claim 6 , wherein the at least one pillar structure comprises a single pillar structure that makes contact with adjacent lower pads among the lower pads of the interposer.
10. 10 . The fan-out type semiconductor package of claim 5 , wherein the at least one pillar structure comprises a plurality of pillar structures comprising: an inner pillar configured surrounding the semiconductor chip in at least a first horizontal direction and a second horizontal direction, opposite to the first horizontal direction; and at least one outer pillar surrounding the inner pillar in at least the first horizontal direction and the second horizontal direction.
11. 11 . The fan-out type semiconductor package of claim 10 , wherein each of the inner pillar and the at least one outer pillar has a rectangular frame shape.
12. 12 . The fan-out type semiconductor package of claim 5 , wherein the at least one pillar structure comprises a plurality of pillar structures comprising a pillar array having a pitch that is the same as a pitch between the lower pads of the interposer.
13. 13 . The fan-out type semiconductor package of claim 5 , wherein the at least one pillar structure comprises a plurality of pillar structures comprising: at least one first pillar extending parallel to opposite side surfaces among the side surfaces of the semiconductor chip; and at least one second pillar extending perpendicular to the at least one first pillar.
14. 14 . The fan-out type semiconductor package of claim 5 , wherein the at least one pillar structure comprises a metal.
15. 15 . The fan-out type semiconductor package of claim 5 , wherein the molding member comprises an upper surface that is coplanar with an upper surface of the semiconductor chip.
16. 16 . The fan-out type semiconductor package of claim 5 , further comprising: conductive bumps between the upper pads of the interposer and the semiconductor chip; and external terminals mounted on a lower surface of the package substrate.

Description

CROSS-REFERENCE TO RELATED APPLICATION This application claims priority from Korean Patent Application No. 10-2022-0077393, filed on Jun. 24, 2022, in the Korean Intellectual Property Office, the contents of which are herein incorporated by reference in their entirety. BACKGROUND 1. Field Example embodiments of the present disclosure relate to a fan-out type semiconductor package and a method of manufacturing the same. More particularly, example embodiments of the present disclosure relate to a fan-out type semiconductor package including an interposer between a semiconductor chip and a package substrate, and a method of manufacturing the fan-out type semiconductor package. 2. Description of the Related Art Generally, a fan-out type semiconductor package may include an interposer arranged between a semiconductor chip and a package substrate. A molding member may be formed on an upper surface of the interposer to surround the semiconductor chip. The interposer may be electrically connected with the package substrate through a plurality of conductive bumps. According to related art, the interposer may be bonded to the package substrate using a bond tool. When the bond tool thermally compresses an upper surface of the molding member, heat may be applied from the bond tool to the conductive bumps through the semiconductor chip and the molding member. However, the molding member may have a low thermal conductivity. Thus, a sufficient heat may not be applied to the conductive bump under the molding member. Before the conductive bump may be normally wetted, a solvent in the molding member may be eluted. As a result, the conductive bump under the molding member may not be accurately bonded to the package substrate to generate an electrical connection between the interposer and the package substrate. Further, when bond tool compresses the upper surface of the molding member, a warpage may be generated at the semiconductor chip and/or the interposer. SUMMARY Example embodiments provide a fan-out type semiconductor package that may be capable of securing an electrical connection between an interposer and a package substrate and suppressing a warpage of the semiconductor chip and/or the interposer. Example embodiments also provide a method of manufacturing the above-mentioned fan-out type semiconductor package. According to example embodiments, a fan-out type semiconductor package is provided. The fan-out type semiconductor package includes: a package substrate; an interposer on an upper surface of the package substrate, the interposer including upper pads and lower pads electrically connected with the upper pads; conductive bumps between the package substrate and the lower pads of the interposer and electrically connecting the package substrate with the interposer; a semiconductor chip on a central portion of an upper surface of the interposer and electrically connected with the upper pads of the interposer, the semiconductor chip having a width narrower than a width of the interposer; a molding member on an edge portion of the upper surface of the interposer such as to surround side surfaces of the semiconductor chip, the molding member including an upper surface coplanar with an upper surface of the semiconductor chip; and a metal pillar structure vertically extending from the upper surface of the molding member to a lower surface of the interposer and configured to individually make contact with the lower pads of the interposer, the metal pillar structure having a cross-sectional area that is equal to or greater than a cross-sectional area of each of the lower pads of the interposer. According to example embodiments, a fan-out type semiconductor package is provided. The fan-out type semiconductor package includes: a package substrate; an interposer on an upper surface of the package substrate, the interposer including upper pads and lower pads electrically connected with the upper pads; conductive bumps between the package substrate and the lower pads of the interposer and electrically connecting the package substrate with the interposer; a semiconductor chip on a central portion of an upper surface of the interposer and electrically connected with the upper pads of the interposer, the semiconductor chip having a width narrower than a width of the interposer; a molding member on an edge portion of the upper surface of the interposer such as to surround side surfaces of the semiconductor chip, the molding member including an upper surface coplanar with an upper surface of the semiconductor chip; and a pillar structure in the molding member, the pillar structure including a material having a thermal conductivity higher than a thermal conductivity of the molding member. According to example embodiments, method of manufacturing a fan-out type semiconductor package is provided. The method includes: bonding a semiconductor chip to a central portion of an upper surface of an interposer; forming a molding member on an edge