US-12622277-B2 - Semiconductor device and method of partial shielding with embedded graphene core shells

Abstract

A semiconductor device has a substrate and an electrical component disposed over the substrate. A first encapsulant is deposited over the electrical component and substrate. A first shielding layer with a graphene core shell is formed on a surface of the first encapsulant. A second encapsulant is deposited over the first encapsulant and first shielding layer. A second shielding layer is formed over the second encapsulant. The first shielding layer is formed at least partially in an opening of the first encapsulant. The graphene core shell has a copper core. The first shielding layer has a plurality of cores covered by graphene and the graphene is interconnected within the first shielding layer to form an electrical path. The electrical path dissipates any charge incident on shielding layer, such as an ESD event, to reduce or inhibit the effects of EMI, RFI, and other inter-device interference.

Inventors

• YongMoo SHIN
• Heesoo Lee
• HeeYoun Kim

Assignees

• STATS ChipPAC Pte. Ltd.

Dates

Publication Date

20260505

Application Date

20230323

Claims (19)

1. 1 . A semiconductor device, comprising: a substrate; an electrical component disposed over the substrate; a first encapsulant deposited over the electrical component and substrate; a first shielding layer including a graphene core shell formed on a surface of the first encapsulant; and a second encapsulant deposited over the first encapsulant and first shielding layer.
2. 2 . The semiconductor device of claim 1 , further including a second shielding layer formed over the second encapsulant.
3. 3 . The semiconductor device of claim 1 , wherein the graphene core shell includes a copper core.
4. 4 . The semiconductor device of claim 1 , wherein the first shielding layer includes a plurality of cores covered by graphene and the graphene is interconnected within the first shielding layer to form an electrical path.
5. 5 . The semiconductor device of claim 1 , wherein the first shielding layer includes thermoset material or polymer or composite epoxy type matrix and the graphene core shell is embedded within the thermoset material or polymer or composite epoxy type matrix.
6. 6 . A semiconductor device, comprising: a substrate; a first encapsulant deposited over the substrate; a first shielding layer including a graphene core shell formed on a surface of the first encapsulant, wherein the graphene core shell includes a copper core; and a second encapsulant deposited over the first encapsulant and first shielding layer.
7. 7 . The semiconductor device of claim 6 , further including a second shielding layer formed over the second encapsulant.
8. 8 . The semiconductor device of claim 6 , further including an electrical component disposed over the substrate.
9. 9 . The semiconductor device of claim 6 , wherein the first shielding layer includes a plurality of cores covered by graphene and the graphene is interconnected within the first shielding layer to form an electrical path.
10. 10 . The semiconductor device of claim 6 , wherein the first shielding layer includes thermoset material or polymer or composite epoxy type matrix and the graphene core shell is embedded within the thermoset material or polymer or composite epoxy type matrix.
11. 11 . A method of making a semiconductor device, comprising: providing a substrate; disposing an electrical component over the substrate; depositing a first encapsulant over the electrical component and substrate; forming a first shielding layer including a graphene core shell on a surface of the first encapsulant; and depositing a second encapsulant over the first encapsulant and first shielding layer.
12. 12 . The method of claim 11 , further including forming a second shielding layer over the second encapsulant.
13. 13 . The method of claim 11 , wherein the graphene core shell includes a copper core.
14. 14 . The method of claim 11 , wherein the first shielding layer includes a plurality of cores covered by graphene and the graphene is interconnected within the first shielding layer to form an electrical path.
15. 15 . The method of claim 11 , wherein the first shielding layer includes thermoset material or polymer or composite epoxy type matrix and the graphene core shell is embedded within the thermoset material or polymer or composite epoxy type matrix.
16. 16 . A method of making a semiconductor device, comprising: providing a substrate; depositing a first encapsulant over the substrate; forming a first shielding layer including a graphene core shell on a surface of the first encapsulant, wherein the graphene core shell includes a copper core; and depositing a second encapsulant over the first encapsulant and first shielding layer.
17. 17 . The method of claim 16 , further including disposing an electrical component over the substrate.
18. 18 . The method of claim 16 , further including forming a second shielding layer over the second encapsulant.
19. 19 . The method of claim 16 , wherein the first shielding layer includes a plurality of cores covered by graphene and the graphene is interconnected within the first shielding layer to form an electrical path.

Description

FIELD OF THE INVENTION The present invention relates in general to semiconductor devices and, more particularly, to a semiconductor device and method of forming a shielding layer with graphene core shells embedded between a first encapsulant and a second encapsulant. BACKGROUND OF THE INVENTION Semiconductor devices are commonly found in modern electronic products. Semiconductor devices perform a wide range of functions, such as signal processing, high-speed calculations, transmitting and receiving electromagnetic signals, controlling electronic devices, photo-electric, and creating visual images for television displays. Semiconductor devices are found in the fields of communications, power conversion, networks, computers, entertainment, and consumer products. Semiconductor devices are also found in military applications, aviation, automotive, industrial controllers, and office equipment. Semiconductor devices, particularly in high frequency applications, such as radio frequency (RF) wireless communications, often contain one or more integrated passive devices (IPDs) to perform necessary electrical functions. Multiple semiconductor die and IPDs can be integrated into an SiP module for higher density in a small space and extended electrical functionality. Within the SIP module, semiconductor die and IPDs are disposed on a substrate for structural support and electrical interconnect. An encapsulant is deposited over the semiconductor die, IPDs, and substrate. The SIP module includes high speed digital and RF electrical components, highly integrated for small size and low height, and operating at high clock frequencies and high power rating. An electromagnetic shielding material is commonly conformally applied over the encapsulant. The electromagnetic shielding material reduces or inhibits electromagnetic interference (EMI), radio frequency interference (RFI), and other inter-device interference, for example as radiated by high-speed digital devices, from affecting neighboring devices within or adjacent to SiP module. The shielding material can be made with copper (Cu) as a cost-effective material with reasonable electrical conductivity. Unfortunately, Cu shielding is subject to oxidation in the atmosphere. A shielding layer robust to the environment with even better electrical conductivity is desired. BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1a-1c illustrate a semiconductor wafer with a plurality of semiconductor die separated by a saw street; FIGS. 2a-21 illustrate a process of forming a shielding layer with graphene core shells embedded between a first encapsulant and second encapsulant layers; FIGS. 3a-3f illustrate a process of forming an opening in a first encapsulant to partially contain the shielding layer; FIGS. 4a-4g illustrate a process of forming a conductive post contacting the shielding layer; FIGS. 5a-5e illustrate a process of forming a vertical shielding layer through the first encapsulant; FIGS. 6a-6b illustrate further detail of the graphene core shell within the shielding layer; FIGS. 7a-7c illustrate a process of forming a graphene core shell; FIGS. 8a-8b illustrate using EHD jet printing to deposit the shielding material over the encapsulant; FIG. 9 illustrates using aerosol jet printing to deposit the shielding material over the encapsulant; and FIG. 10 illustrates a printed circuit board (PCB) with different types of packages disposed on a surface of the PCB. DETAILED DESCRIPTION OF THE DRAWINGS The present invention is described in one or more embodiments in the following description with reference to the figures, in which like numerals represent the same or similar elements. While the invention is described in terms of the best mode for achieving the invention's objectives, it will be appreciated by those skilled in the art that it is intended to cover alternatives, modifications, and equivalents as may be included within the spirit and scope of the invention as defined by the appended claims and their equivalents as supported by the following disclosure and drawings. The features shown in the figures are not necessarily drawn to scale. Elements having a similar function are assigned the same reference number in the figures. The term “semiconductor die” as used herein refers to both the singular and plural form of the words, and accordingly, can refer to both a single semiconductor device and multiple semiconductor devices. Semiconductor devices are generally manufactured using two complex manufacturing processes: front-end manufacturing and back-end manufacturing. Front-end manufacturing involves the formation of a plurality of die on the surface of a semiconductor wafer. Each die on the wafer contains active and passive electrical components, which are electrically connected to form functional electrical circuits. Active electrical components, such as transistors and diodes, have the ability to control the flow of electrical current. Passive electrical components, such as capacitors,