US-12622278-B2 - Semiconductor package

US12622278B2US 12622278 B2US12622278 B2US 12622278B2US-12622278-B2

Abstract

A device which enables protection against an abruptly rising pulse such as an electromagnetic pulse in a compact size at a device level and a semiconductor package in which the device is mounted are provided. The semiconductor package ( 1, 2, 3 ) includes a substrate ( 12, 60, 70 ), an IC chip ( 21 ) arranged on the substrate ( 12, 60, 70 ), a plurality of connection parts ( 30 ) configured to connect the IC chip ( 21 ) to the outside, a plurality of bonding wires ( 40 ) configured to connect the IC chip ( 21 ) and corresponding ones of the plurality of connection parts ( 30 ), and a mechanism configured to bypass surge current applied to any of the plurality of connection parts ( 30 ) from the connection parts ( 30 ) to a ground potential via a path different from the plurality of bonding wires ( 40 ).

Inventors

Syusaku Yamamoto
Yuichiro Kamino
Takatoshi Tojo
Minoru Tsukazaki
Naoyuki Tsukamoto

Assignees

MITSUBISHI HEAVY INDUSTRIES, LTD.
OTOWA ELECTRIC CO., LTD.

Dates

Publication Date: 20260505
Application Date: 20211227
Priority Date: 20210331

Claims (3)

1 . A semiconductor package comprising: a substrate; an IC chip arranged on the substrate; a plurality of connection parts configured to connect the IC chip to an outside; a plurality of bonding wires configured to connect the IC chip and corresponding ones of the plurality of connection parts; a mechanism configured to bypass surge current applied to any of the plurality of connection parts from the connection parts to a ground potential via a path different from the plurality of bonding wires; a seal lid arranged to be faced to the substrate; protection elements arranged in contact with surfaces of the plurality of respective connection parts on at least one side in a vertical direction and having a resistance value which decreases when a voltage of more than or equal to a predetermined value is applied; and conductive external bypass elements arranged in contact with surfaces of the protection elements on a side opposite to the plurality of respective connection parts, wherein the external bypass elements include at least one of the external bypass elements arranged in contact with the substrate and at least one other of the external bypass elements arranged in contact with the seal lid, the protection elements are arranged in contact with respective surfaces of the plurality of connection parts on both surface sides.
2 . The semiconductor package according to claim 1 , wherein the protection elements are nonlinear resistor bodies formed in a thin-film shape.
3 . The semiconductor package according to claim 1 , wherein adjacent ones of the protection elements are arranged separately from each other.

Description

TECHNICAL FIELD The present invention relates to an improved semiconductor package that can protect against a high-voltage pulse induced in an electronic circuit by electromagnetic pulse radiation or the like. BACKGROUND ART Conventionally, electronic circuits including semiconductor devices are used in many apparatuses. In electronic circuit equipment, various external factors such as a high-voltage pulse induced in an electronic circuit by electromagnetic pulse radiation are present in a usage environment in addition to surges represented by a lightning surge and a static surge. A surge protection device such as a varistor or an avalanche diode is used for surge protection, and it is considered that technologies concerning criteria for selection of those protection devices and application methods have mostly been established. However, few examples study device-level protection guidelines for a high voltage having an abrupt rise at a several nanosecond level induced by electromagnetic pulse radiation. When a high-voltage pulse induced by an electromagnetic pulse represented by HEMP (High Altitude Electro Magnetic Pulse: a rapidly-rising and intense electromagnetic pulse induced by high altitude nuclear explosion) is applied to a lead inductance of a semiconductor device or the like, a terminal voltage increases, and the high voltage may be applied to bonding wires which connect a semiconductor package and a bear chip and to solder bumps. As a damage caused in a case where a high voltage exceeding a normal operation voltage is applied to a semiconductor device, a malfunction of the semiconductor device is conceivable first. In addition, since the bonding wires and the solder bumps are narrow conduction paths having diameters less than 100 μm, a likelihood that in a case where a high voltage of several hundred volts flows, they are fused and scattered to result in a physical breakage of the semiconductor device is anticipated. In other words, in a case where an electromagnetic pulse flows, a fatal situation for the device inevitably occurs. For the above reasons, a protection device targeted at a high-voltage pulse is becoming more important year by year. Examples of a few countermeasures currently taken for such a high-voltage pulse include a method of covering the entire electronic circuit equipment which is a protection target with a Faraday cage as disclosed in Patent Literature 1. CITATION LIST Patent Literature Patent Literature 1: Japanese Patent Laid-Open No. 49-85963 SUMMARY OF INVENTION Technical Problem However, the Faraday cage is an installation having a relatively massive and special structure, thus requiring extremely high introduction cost. Thus, in the present circumstances, the application thereof is extremely limited not only in consumer products but also in critical infrastructures. Consequently, most electronic circuit equipment existing in the world is in a state unprotected against rising voltages of several nanoseconds represented by an electromagnetic pulse. The present invention was made to solve the above-described problem, and has an object to provide a semiconductor package in which a device which enables protection against an abruptly rising electromagnetic pulse such as an electromagnetic pulse at a device level is mounted. Solution to Problem A semiconductor package of the present invention includes a substrate, an IC chip arranged on the substrate, a plurality of connection parts configured to connect the IC chip to an outside, a plurality of bonding wires configured to connect the IC chip and corresponding ones of the plurality of connection parts, and a mechanism configured to bypass surge current applied to any of the plurality of connection parts from the connection parts to a ground potential via a path different from the plurality of bonding wires. Preferably, the semiconductor package of the present invention further includes a seal lid arranged to be faced to the substrate, protection elements arranged in contact with surfaces of the plurality of respective connection parts on at least one side in a vertical direction and having a resistance value which decreases when a voltage of more than or equal to a predetermined value is applied, and conductive external bypass elements arranged in contact with surfaces of the protection elements on a side opposite to the plurality of respective connection parts, in which the external bypass elements are at least one of the external bypass elements arranged in contact with the substrate and the external bypass elements arranged in contact with the seal lid. Preferably, in the semiconductor package of the present invention, the protection elements are arranged in contact with respective surfaces of the plurality of connection parts on both surface sides, the external bypass elements are arranged in contact with respective surfaces of the protection elements on the side opposite to the plurality of connection parts, and the externa