US-12622279-B2 - Package with dual layer routing including ground return path

Abstract

A package includes a first leadframe including a plurality of leads and a conductor, a first semiconductor die mounted on a first surface of the first leadframe and attached to a first subset of the plurality of leads and the conductor, and a second semiconductor die mounted on the first surface of the first leadframe and attached a second subset of the plurality of leads and the conductor. The conductor provides a direct electrical connection for an electrical signal between the first semiconductor die and the second semiconductor die. The package further includes a second leadframe. The first leadframe is mounted on the second leadframe via a second surface of the first leadframe, the second surface opposite the first surface. The second leadframe provides a ground return path between the between the first semiconductor die and the second semiconductor die for the electrical signal.

Inventors

• Woochan Kim
• Benjamin Allen Samples
• Vivek Kishorechand Arora

Assignees

• TEXAS INSTRUMENTS INCORPORATED

Dates

Publication Date

20260505

Application Date

20181217

Claims (17)

1. 1 . A package comprising: a first leadframe including a plurality of leads and a conductor; a first semiconductor die mounted on a first surface of the first leadframe and attached to a first subset of the plurality of leads and the conductor; a second semiconductor die mounted on the first surface of the first leadframe and attached to a second subset of the plurality of leads and the conductor, the conductor providing a direct electrical connection between the first semiconductor die and the second semiconductor die; and a second leadframe, the first leadframe mounted on the second leadframe via a second surface of the first leadframe, the second surface facing in an opposite direction to the first surface; wherein the second leadframe includes a first lead electrically coupled to the first semiconductor die, a second lead electrically coupled to the second semiconductor die, and a conductive member connecting the first lead to the second lead and having a thickness less than the first and second leads.
2. 2 . The package of claim 1 , further comprising a mold compound covering portions of the first leadframe but not the second leadframe.
3. 3 . The package of claim 2 , wherein the mold compound further covers portions of the first semiconductor die and the second semiconductor die.
4. 4 . The package of claim 2 , wherein the mold compound forms a first mold, the package further comprising a second mold of the mold compound, the second mold of the mold compound filling space between the first leadframe and the second leadframe and covering the first mold and portions of the second leadframe.
5. 5 . The package of claim 4 , wherein the second leadframe forms a recess including the first leadframe, the first semiconductor die, and the second semiconductor die that are recessed relative to portions of the second leadframe surrounding the recess, and the second mold of the mold compound further covers the first semiconductor die and the second semiconductor die within the recess.
6. 6 . The package of claim 4 , wherein the second mold of the mold compound is flush with a surface of the second leadframe opposite the first leadframe, and wherein the surface is exposed on a package surface of the package.
7. 7 . The package of claim 1 , wherein the first leadframe and the second leadframe are in a stacked arrangement, and a route of the direct electrical connection of the first leadframe overlaps a route of a ground return path between the first semiconductor die and the second semiconductor die provided by the conductive member of the second leadframe.
8. 8 . The package of claim 1 , wherein the first semiconductor die is mounted on the first surface of the first leadframe in a first flipchip arrangement, and the second semiconductor die is mounted on the first surface of the first leadframe in a second flipchip arrangement.
9. 9 . The package of claim 1 , wherein the second leadframe forms a recess including the first leadframe, the first semiconductor die, and the second semiconductor die that are recessed relative to portions of the second leadframe surrounding the recess.
10. 10 . The package of claim 1 , wherein the first semiconductor die is a gallium nitride die.
11. 11 . The package of claim 1 , wherein the first leadframe is formed from a first sheet of metal and the second leadframe is formed from a second sheet of metal.
12. 12 . The package of claim 1 , wherein the conductor of the first leadframe is electrically and physically isolated from the plurality of leads of the first leadframe.
13. 13 . The package of claim 1 , wherein the first semiconductor die is separated from the second semiconductor die by an area therebetween, the conductor extends between a first end of the conductor and a second end of the conductor, the first end of the conductor extends beyond a first side of the area, and the second end of the conductor extends beyond a second side of the area opposite the first side.
14. 14 . The package of claim 1 , wherein the second leadframe includes a bonding surface that is recessed relative to an outer surface of the second leadframe, the first leadframe mounted to the bonding surface, the bonding surface recessed relative to the outer surface by a first distance, the first and second semiconductor dies disposed within the first distance between the bonding surface and the outer surface.
15. 15 . A package comprising: a first leadframe including a plurality of leads; a first gallium nitride die mounted on a first surface of the first leadframe and attached to a first subset of the plurality of leads and a conductor; a second gallium nitride die mounted on the first surface of the first leadframe and attached to a second subset of the plurality of leads and the conductor, the conductor providing a direct electrical connection between the first gallium nitride die and the second gallium nitride die; and a second leadframe, the first leadframe mounted on the second leadframe via a second surface of the first leadframe, the second surface facing in an opposite direction to the first surface, wherein the second leadframe includes a first lead electrically coupled to the first gallium nitride die, a second lead electrically coupled to the second gallium nitride die, and a conductive member connecting the first lead to the second lead and having a thickness less than the first and second leads.
16. 16 . The package of claim 13 , wherein the conductive member of the second leadframe extends between a first end of the conductive member and a second end of the conductive member, the first end of the conductive member extends beyond the first end of the conductor, and the second end of the conductive member extends beyond the second end of the conductor.
17. 17 . The package of claim 16 , wherein the conductor is positioned between the first and second semiconductor dies, and the conductor extends in a same direction as the conductive member.

Description

TECHNICAL FIELD This disclosure relates to integrated circuit packages. BACKGROUND An electrical signal between two semiconductor dies of the semiconductor package may be carried on one or more conductors of the package, such as leadframe conductors. In addition, return current of the electrical signal can traverse the ground terminals of the semiconductor dies to the ground reference plane of the circuit the semiconductor package is connected to, such as a printed circuit board. The path of the current loop of the electrical includes the package conductor carrying the electrical signal between the semiconductor dies, as well as the semiconductor dies' ground terminals and the ground reference plane of the printed board carrying the return current. This current loop path provides an impedance associated with the electrical signal. BRIEF SUMMARY This disclosure includes techniques for integrated circuit (IC) packages that provide a ground return path within the package for electronic signals between semiconductor dies in the package. The disclosed techniques may allow a lower impedance of a signal loop for electronic signals between the dies as compared to IC packages that rely on the ground plane of the underlying circuit. Reducing the impedance of the signal path may mitigate voltage overshoot of the electronic signals between semiconductor dies, thereby facilitating higher frequency communications between the semiconductor dies, as voltage overshoot can interfere with signal transmission. In one example, a package includes a first leadframe including a plurality of leads and a conductor, a first semiconductor die mounted on a first surface of the first leadframe and attached to a first subset of the plurality of leads and the conductor, and a second semiconductor die mounted on the first surface of the first leadframe and attached a second subset of the plurality of leads and the conductor. The conductor provides a direct electrical connection for an electrical signal between the first semiconductor die and the second semiconductor die. The package further includes a second leadframe. The first leadframe is mounted on the second leadframe via a second surface of the first leadframe, the second surface opposite the first surface. The second leadframe provides a ground return path between the between the first semiconductor die and the second semiconductor die for the electrical signal. In another example, a method of forming a package includes arranging a first semiconductor die on a first surface of a first leadframe, arranging a second semiconductor die on the first surface of the first leadframe. The first leadframe provides a direct electrical connection for an electrical signal between the first semiconductor die and the second semiconductor die. The method further includes attaching the first leadframe with the first semiconductor die and the second semiconductor die to a second leadframe. The second leadframe provides a ground return path between the between the first semiconductor die and the second semiconductor die for the electrical signal. In another example, a package includes a first leadframe including a plurality of leads, a first gallium nitride die mounted on a first surface of the first leadframe and attached to a first subset of the plurality of leads and a conductor, a second gallium nitride die mounted on the first surface of the first leadframe and attached to a second subset of the plurality of leads and the conductor. The conductor provides a direct electrical connection for an electrical signal between the first gallium nitride die and the second gallium nitride die. The package further includes a second leadframe. The first leadframe is mounted on the second leadframe via a second surface of the first leadframe, the second surface opposite the first surface. The second leadframe provides a ground return path between the between the first gallium nitride die and the second gallium nitride die for the electrical signal. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is a conceptual drawing showing a top view of a semiconductor package providing a ground return path within the package. FIG. 1B is a conceptual drawing showing a cut-away side view of the semiconductor package of FIG. 1A. FIGS. 2A-2D are conceptual drawings showing top views of components of the semiconductor package of FIG. 1A. FIGS. 3A-3F are conceptual drawings showing example manufacturing steps to form the semiconductor package of FIG. 1A. FIG. 4 is a flowchart of a method of manufacturing a semiconductor package providing a ground return path within the package. FIG. 5 is a flowchart of a method of operating a semiconductor package providing a ground return path within the package. FIG. 6 is a conceptual drawing showing a cut-away side view of a semiconductor package providing a ground return path within the package. DETAILED DESCRIPTION IC packages provide a ground return path with the package, facilitating a low imp