US-12622281-B2 - Doherty amplifier

Abstract

A Doherty amplifier according to the present disclosure includes an input terminal, an output terminal, a carrier amplifier connected between the input terminal and the output terminal, a peak amplifier connected in parallel to the carrier amplifier between the input terminal and the output terminal, a first input matching circuit connected between the input terminal and the carrier amplifier and a second input matching circuit connected between the input terminal and the peak amplifier, wherein the carrier amplifier and the peak amplifier output signals toward outside in directions opposite to each other.

Inventors

• Jun Takaso

Assignees

• MITSUBISHI ELECTRIC CORPORATION

Dates

Publication Date

20260505

Application Date

20210407

Claims (10)

1. 1 . A Doherty amplifier comprising: an input terminal; an output terminal; a carrier amplifier connected between the input terminal and the output terminal; a peak amplifier connected in parallel to the carrier amplifier between the input terminal and the output terminal; a first input matching circuit connected between the input terminal and the carrier amplifier; and a second input matching circuit connected between the input terminal and the peak amplifier, wherein an output of the carrier amplifier faces a first direction away from the first input matching circuit and an output of the peak amplifier faces a second direction away from the second input matching circuit, and the output of the carrier amplifier and the output of the peak amplifier are connected to the output terminal passing outside a region between the carrier amplifier and the peak amplifier.
2. 2 . The Doherty amplifier according to claim 1 , wherein the carrier amplifier and the peak amplifier are arranged in a direction in which the carrier amplifier outputs a signal.
3. 3 . The Doherty amplifier according to claim 1 , wherein the first input matching circuit and the second input matching circuit are arranged between the carrier amplifier and the peak amplifier.
4. 4 . The Doherty amplifier according to claim 1 , wherein a central line of the carrier amplifier matches a central line of the first input matching circuit, and a central line of the peak amplifier matches a central line of the second input matching circuit.
5. 5 . The Doherty amplifier according to claim 1 , comprising: an output-side λ/4 electrical length line connected between one of the carrier amplifier and the peak amplifier, and the output terminal; and an input-side λ/4 electrical length line connected between the input terminal and one of the first input matching circuit and the second input matching circuit to which the output-side λ/4 electrical length line is not connected on an output side, wherein the output-side λ/4 electrical length line is provided outside the region between the carrier amplifier and the peak amplifier.
6. 6 . The Doherty amplifier according to claim 1 , wherein the first input matching circuit and the second input matching circuit are formed in one chip.
7. 7 . The Doherty amplifier according to claim 6 , wherein the first input matching circuit and the second input matching circuit are formed in one integrated passive device.
8. 8 . The Doherty amplifier according to claim 1 , comprising: a first anterior stage amplifier connected between the first input matching circuit and the input terminal; and a second anterior stage amplifier connected between the second input matching circuit and the input terminal, wherein the first anterior stage amplifier and the second anterior stage amplifier are formed in one chip.
9. 9 . The Doherty amplifier according to claim 1 , comprising: a first anterior stage amplifier connected between the first input matching circuit and the input terminal; and a second anterior stage amplifier connected between the second input matching circuit and the input terminal, wherein the carrier amplifier and the first anterior stage amplifier are formed in one chip, and the peak amplifier and the second anterior stage amplifier are formed in one chip.
10. 10 . The Doherty amplifier according to claim 1 , comprising: a first anterior stage amplifier connected between the first input matching circuit and the input terminal; and a second anterior stage amplifier connected between the second input matching circuit and the input terminal, wherein the carrier amplifier and the second anterior stage amplifier are formed in one chip, and the peak amplifier and the first anterior stage amplifier are formed in one chip.

Description

FIELD The present disclosure relates to a Doherty amplifier. BACKGROUND PTL 1 discloses a Doherty amplifier. The Doherty amplifier includes a divider that divides an input signal into two signals, a carrier amplifier to which one of the two signals is input and which includes a first field effect transistor (FET), and a peak amplifier to which the other of the two signals is input and which includes a second FET. Further, the Doherty amplifier includes a synthesizer that adjusts the impedance of an output of the carrier amplifier and an output of the peak amplifier, and synthesizes an output signal of the carrier amplifier and an output signal of the peak amplifier. CITATION LIST Patent Literature [PTL 1] JP 2012-28880 A SUMMARY Technical Problem In PTL 1, the carrier amplifier and the peak amplifier are closely arranged side by side. Thus, there is a possibility that a signal of the carrier amplifier and a signal of the peak amplifier interfere with each other. An object of the present disclosure is to provide a Doherty amplifier capable of preventing interference of signals. Solution to Problem A Doherty amplifier according to the present disclosure includes an input terminal, an output terminal, a carrier amplifier connected between the input terminal and the output terminal, a peak amplifier connected in parallel to the carrier amplifier between the input terminal and the output terminal, a first input matching circuit connected between the input terminal and the carrier amplifier and a second input matching circuit connected between the input terminal and the peak amplifier, wherein the carrier amplifier and the peak amplifier output signals toward outside in directions opposite to each other. Advantageous Effects of Invention In a Doherty amplifier according to the present disclosure, a carrier amplifier and a peak amplifier output signals in directions opposite to each other. It is therefore possible to prevent interference of the signals. BRIEF DESCRIPTION OF DRAWINGS FIG. 1 is a plan view of a Doherty amplifier according to a first embodiment. FIG. 2 is a plan view of a Doherty amplifier according to a comparative example. FIG. 3 is a plan view of a Doherty amplifier according to a second embodiment. FIG. 4 is a plan view of a Doherty amplifier according to a third embodiment. FIG. 5 is a plan view of a Doherty amplifier according to a fourth embodiment. FIG. 6 is a plan view of a Doherty amplifier according to a fifth embodiment. FIG. 7 is a plan view of a Doherty amplifier according to a sixth embodiment. DESCRIPTION OF EMBODIMENTS A Doherty amplifier according to each embodiment of the present disclosure is described with reference to drawings. Identical or corresponding constitutional elements are given the same reference numerals, and the repeated description of such constitutional elements may be omitted. First Embodiment FIG. 1 is a plan view of a Doherty amplifier 100 according to a first embodiment. The Doherty amplifier 100 includes an input terminal 10, an output terminal 40, a carrier amplifier 20 connected between the input terminal 10 and the output terminal 40, and a peak amplifier 30 connected in parallel to the carrier amplifier 20 between the input terminal 10 and the output terminal 40. The carrier amplifier 20 is also referred to as a main amplifier. The peak amplifier 30 is also referred to as an auxiliary amplifier. The carrier amplifier 20 is a transistor that amplifies a signal in a power range from a low power range to a high power range. The peak amplifier 30 is a transistor that amplifies a signal in a high power range. A divider 16 divides an input signal from the input terminal 10 to a first input line 11 and a second input line 12. A 2-input terminal may be used as the input terminal 10 without the divider 16 being provided. A first anterior stage amplifier 13 is provided on the first input line 11. A second anterior stage amplifier 14 is provided on the second input line 12. Further, an input-side λ/4 electrical length line 15 is provided on an output side of the second anterior stage amplifier 14 on the second input line 12. The input-side λ/4 electrical length line 15 has an electrical length that is an odd multiple of λ/4 of the input signal. In other words, the electrical length of the input-side λ/4 electrical length line 15 is λ/4, 3λ/4, 5λ/4, . . . with respect to a wavelength λ of the input signal of the Doherty amplifier 100. A first input matching circuit 22 is connected to an end portion on an opposite side of the input terminal 10, of the first input line 11. The carrier amplifier 20 is connected to output of the first input matching circuit 22. The first input matching circuit 22 is connected between the input terminal 10 and the carrier amplifier 20. A second input matching circuit 32 is connected to an end portion on an opposite side of the input terminal 10, of the second input line 12. The peak amplifier 30 is connected to output of the second input m