US-12622289-B2 - Double-sided laminate package with 3D interconnection structure

Abstract

Methods and devices for implementing vias as third-dimension connections in double-sided laminate packages for RF front-end circuits are disclosed. The described methods and devices are based on implementing components of an electronic module in two different integrated circuits and dispose the two integrated circuits on the opposite side of an isolating laminate. The components within one integrated circuit can be coupled to the components on the other integrated circuit by creating vias inside the laminate.

Inventors

• Yuan Wei

Assignees

• PSEMI CORPORATION

Dates

Publication Date

20260505

Application Date

20221117

Claims (20)

1. 1 . An electronic module comprising: a laminate having a first side and a second side, the second side being opposite to the first side, the laminate being made of a dielectric material; first side metal traces disposed on the first side of the laminate and second side metal traces disposed on the second side of the laminate; a first integrated circuit (IC) comprising a plurality of first side IC bumps; the first IC being disposed along a first plane and coupled to the first side metal traces via the plurality of first side IC bumps; a second IC comprising a plurality of second side IC bumps; the second IC being disposed along a second plane and coupled to the second side metal traces via the plurality of second side IC bumps; and a plurality of vias disposed inside the laminate, wherein: each via of the plurality of vias connects a first side IC bump of the plurality of first side IC bumps to a corresponding second side IC bump of the plurality of second side IC bumps, and the first IC comprises a first side antenna switch and the second IC comprises a second side antenna switch.
2. 2 . The electronic module of claim 1 , wherein the laminate further comprises internal metal traces.
3. 3 . The electronic module of claim 1 , wherein each of the first and the second IC comprises a metal layer.
4. 4 . The electronic module of claim 1 , mounted on a printed circuit board through copper pillars.
5. 5 . An electronic module comprising: a laminate comprising a dielectric material; first side metal traces disposed on a first side of the laminate; second side metal traces disposed on a second side of the laminate; a first integrated circuit (IC) comprising a plurality of first side IC bumps, the first IC being disposed along a first plane and coupled to the first side metal traces via the plurality of first side IC bumps; a second IC comprising a plurality of second side IC bumps, the second IC being disposed along a second plane and coupled to the second side metal traces via the plurality of second side IC bumps; and a plurality of vias disposed inside the laminate, wherein each via of the plurality of vias connects a first side IC bump of the plurality of first side IC bumps to a corresponding second side IC bump of the plurality of second side IC bumps; and wherein the first IC comprises a first side antenna switch and the second IC comprises a second side antenna switch.
6. 6 . The electronic module of claim 5 , wherein: the first side antenna switch comprises: a first antenna rail, and a second antenna rail; a first set of switches coupling the first antenna rail to a corresponding first side IC bump, and a second set of switches coupling the second antenna rail to a corresponding first side IC bump.
7. 7 . The electronic module of claim 6 , wherein: the second side antenna switch comprises: a third antenna rail, and a fourth antenna rail; a third set of switches coupling the third antenna rail to a corresponding second side IC bump, and a fourth set of switches coupling the fourth antenna rail to a corresponding second side IC bump.
8. 8 . The electronic module of claim 7 , wherein each of the antenna rails has a shape of a straight line.
9. 9 . The electronic module of claim 8 , wherein the first side IC bumps are arranged in a straight line and disposed in between the first and the second antenna rails.
10. 10 . The electronic module of claim 9 , wherein the second side IC bumps are arranged in a straight line and disposed in between the third and the fourth antenna rails.
11. 11 . The electronic module of claim 7 , wherein: each of the first and the third antenna rails comprises a first, a second, and a third section; the second section of the first antenna rails connects the first section of the first antenna rail to the third section of the first antenna rail; the second section of the third antenna rails connects the first section of the third antenna rail to the third section of the third antenna rail; the first side IC bumps comprise a first bump subset and a second bump subset; bumps of the first bump subset are disposed in a straight line in between the first section of the first antenna rail and the second antenna rail; bumps of the second bump subset are disposed in a straight line in between the second antenna rail and the third section of the first antenna rail; the second side IC bumps comprise a third bump subset and a fourth bump subset; bumps of the third bump subset are disposed in a straight line in between the first section of the third antenna rail and the fourth antenna rail; bumps of the fourth bump subset are disposed in a straight line in between the fourth antenna rail and the third section of the third antenna rail.
12. 12 . The electronic module of claim 7 , wherein: each of the first and the third antenna rails comprises a first, a second, and a third section; the second section of each of the antenna rails connects the first section of the each of the antenna rails to the third section of the same antenna rail; the first side IC bumps comprises a first, a second, and a third set of IC bumps; IC bumps of the first set of IC bumps are disposed in a straight line in between the first section of the first antenna rail and the first section of the second antenna rail; IC bumps of the second set of IC bumps are disposed in a straight line in between the third section of the first antenna rail and the first section of the second antenna rail; IC bumps of the third set of IC bumps are disposed in a straight line in between the third section of the first antenna rail and the third section of the second antenna rail.
13. 13 . The electronic module of claim 12 , wherein: the second side IC bumps comprises a fourth, a fifth, and a sixth set of IC bumps; IC bumps of the fourth set of IC bumps are disposed in a straight line in between the first section of the third antenna rail and the first section of the fourth antenna rail; IC bumps of the fifth set of IC bumps are disposed in a straight line in between the third section of the third antenna rail and the first section of the fourth antenna rail; IC bumps of the sixth set of IC bumps are disposed in a straight line in between the third section of the third antenna rail and the third section of the fourth antenna rail.
14. 14 . A radio frequency (RF) front-end module comprising a laminate having a first side and a second side, the second side being opposite to the first side, the laminate being made of a dielectric material; first side metal traces disposed on the first side of the laminate and second side metal traces disposed on the second side of the laminate; a first integrated circuit (IC) comprising a plurality of first side IC bumps; the first IC being disposed along a first plane and coupled to the first side metal traces via the plurality of first side IC bumps; a second IC comprising a plurality of second side IC bumps; the second IC being disposed along a second plane and coupled to the second side metal traces via the plurality of second side IC bumps; and a plurality of vias disposed inside the laminate, wherein: each via of the plurality of vias connects a first side IC bump of the plurality of first side IC bumps to a corresponding second side IC bump of the plurality of second side IC bumps.
15. 15 . The electronic module of claim 1 , wherein: the first side antenna switch comprises: a first antenna rail, and a second antenna rail; a first set of switches coupling the first antenna rail to a corresponding first side IC bump, and a second set of switches coupling the second antenna rail to a corresponding first side IC bump.
16. 16 . The electronic module of claim 15 , wherein: the second side antenna switch comprises: a third antenna rail, and a fourth antenna rail; a third set of switches coupling the third antenna rail to a corresponding second side IC bump, and a fourth set of switches coupling the fourth antenna rail to a corresponding second side IC bump.
17. 17 . The electronic module of claim 16 , wherein each of the antenna rails has a shape of a straight line.
18. 18 . The electronic module of claim 17 , wherein the first side IC bumps are arranged in a straight line and disposed in between the first and the second antenna rails.
19. 19 . The electronic module of claim 17 , wherein the second side IC bumps are arranged in a straight line and disposed in between the third and the fourth antenna rails.
20. 20 . The electronic module of claim 16 , wherein: each of the first and the third antenna rails comprises a first, a second, and a third section; the second section of the first antenna rails connects the first section of the first antenna rail to the third section of the first antenna rail; the second section of the third antenna rails connects the first section of the third antenna rail to the third section of the third antenna rail; the first side IC bumps comprise a first bump subset and a second bump subset; bumps of the first bump subset are disposed in a straight line in between the first section of the first antenna rail and the second antenna rail; bumps of the second bump subset are disposed in a straight line in between the second antenna rail and the third section of the first antenna rail; the second side IC bumps comprise a third bump subset and a fourth bump subset; bumps of the third bump subset are disposed in a straight line in between the first section of the third antenna rail and the fourth antenna rail; bumps of the fourth bump subset are disposed in a straight line in between the fourth antenna rail and the third section of the third antenna rail.

Description

TECHNICAL FIELD The present disclosure is related to double-sided laminate packages, more in particular to methods and devices for implementing vias as third dimension connections in double-sided laminate packages, such as double-sided laminate packages in radio frequency (RF) front-end modules of mobile communication devices. BACKGROUND In a regular assembly process of integrated circuits for RF front-end modules of mobile communication devices, single-sided laminate packaging may be implemented. In such approach, the integrated circuit (IC) of interest is disposed on one side of the laminate while the other side is mostly used for connecting to the printed circuit board (PCB). FIG. 1 shows a prior art antenna switch (ASW, 100) implemented as part of a radio frequency (RF) front-end module of a mobile communication device. ASW (100) represents a three-pole n-throw ASW implemented in a planar structure. Such ASW includes antenna rails (R1, R2, R3), a first set of switches (S11, . . . , S1n) coupling first rail (R1) to IC bumps (A1, . . . , An), a second set of switches (S21, . . . , S2n) coupling antenna rail (R2) to IC bumps (B1, . . . Bn), and a third set of switches (S31, . . . , S3n) coupling antenna rail (R3) to IC bumps (B1, . . . , Bn). The ASW structure relies on planar IC metal layers and laminate traces to provide interconnections. As shown, metal traces (W1, . . . , Wn) connect transmit bumps (A1, . . . , An) to transmit bumps (B1, . . . , Bn), and such connections enable the coupling of rail (R1) to bumps (B1, . . . , Bn). There are several drawbacks associated with the planar structure of FIG. 1: IC metal overlap and the coupling between adjacent routings make isolation requirements difficult to meet;Input/output (I/O) allocations are not flexible and this often results in prohibitively long laminate traces; andASWs with higher number of poles (e.g. four or more) are very challenging to design. The above-mentioned issues pose challenges on the overall design of an RF front-end module. SUMMARY The disclosed teachings address the above-mentioned challenges. The described methods and devices implement vias as third dimension connections, which greatly improve routing flexibility and make use of mid-layer ground as free shielding. The disclosed methods allow a more flexible design of I/O arrangements. This effectively means shorter interconnections on the module, and thus improved insertion losses and lower overall parasitic capacitances. According to a first aspect of the present disclosure, an electronic module is provided, comprising: a laminate having a first side and a second side, the second side being opposite to the first side, the laminate being made of a dielectric material; first side metal traces disposed on the first side of the laminate and second side metal traces disposed on the second side of the laminate; a first integrated circuit (IC) comprising a plurality of first side IC bumps; the first IC being disposed along a first plane and coupled to the first side metal traces via the plurality of first side IC bumps; a second IC comprising a plurality of second side IC bumps; the second IC being disposed along a second plane and coupled to the second side metal traces via the plurality of second side IC bumps; and a plurality of vias disposed inside the laminate, wherein: each via of the plurality of vias connects a first side IC bump of the plurality of first side IC bumps to a corresponding second side IC bump of the plurality of second side IC bumps. According to a second aspect of the present disclosure, a method of three-dimensionally connecting electronic components of an electronic module is disclosed, the method comprising: providing a first and a second integrated circuit (IC), each IC including electronic components and IC bumps; providing a laminate with a first side and a second side, the laminate having metal traces on each of the first side and the second side; using the IC bumps of the first IC to electrically connecting the first IC to the metal traces of the first side of the laminate; using the IC bumps of the second IC to electrically connecting the second IC to the metal traces of the second side of the laminate, and disposing vias inside the laminate to electrically connect the IC bumps of the first IC to the IC bumps of the second IC. Further aspects of the disclosure are provided in the description, drawings and claims of the present application. DESCRIPTION OF THE DRAWINGS FIG. 1 shows a prior art antenna switch. FIG. 2A shows a cross-sectional view of an example electronic module according to an embodiment of the present disclosure. FIG. 2B shows a top-view of an example electronic module according to an embodiment of the present disclosure FIGS. 3A-3D are example implementations of the embodiment of FIG. 2A according to an embodiment of the present disclosure. FIG. 4 shows an example implementation of FIG. 2A according to an embodiment of the present disclosu