US-12622298-B2 - Electronic package, packaging substrate and fabricating method thereof

US12622298B2US 12622298 B2US12622298 B2US 12622298B2US-12622298-B2

Abstract

An electronic package, a packaging substrate and a fabricating method are provided, in which a conductive bump pad is formed on an electrical contact pad of the packaging substrate, so that when an electronic element is bonded to the packaging substrate via a solder material in a flip-chip process, the conductive bump pad can guide the flow of the solder material. Therefore, the problem of empty soldering caused by the solder material not effectively contacting with the electrical contact pad can be avoided.

Inventors

Chan-Yu YEH
Yu-Cheng Pai
Yuan-Ping YEH
Yuan-Chang NI
Meng-Jou HE

Assignees

SILICONWARE PRECISION INDUSTRIES CO., LTD.

Dates

Publication Date: 20260505
Application Date: 20230530
Priority Date: 20230218

Claims (20)

1 . A packaging substrate, comprising: a routing structure having a first surface and a second surface opposing the first surface, and comprising an insulating layer and a routing layer formed on the insulating layer; a circuit layer embedded in the insulating layer of the second surface of the routing structure and electrically connected to the routing layer, wherein the circuit layer has a plurality of electrical contact pads exposed from the insulating layer; and a conductive bump pad disposed on at least one of the plurality of electrical contact pads, wherein a width of the conductive bump pad is less than a width of each of the electrical contact pads, and a material for forming the conductive bump pad is different from a material for forming the electrical contact pads, wherein the conductive bump pad has a pad surface no higher than the second surface of the routing structure.
2 . The packaging substrate of claim 1 , wherein the material for forming the conductive bump pad is nickel, and the material for forming the electrical contact pads is copper.
3 . The packaging substrate of claim 1 , wherein the conductive bump pad is embedded in each of the electrical contact pads.
4 . The packaging substrate of claim 1 , wherein the insulating layer is formed with a recess at each of the electrical contact pads, and the conductive bump pad is located in the recess.
5 . The packaging substrate of claim 4 , wherein a distance between the conductive bump pad and a wall of the recess is greater than one third of the width of each of the electrical contact pads.
6 . The packaging substrate of claim 1 , wherein a width of the insulating layer between two adjacent ones of the plurality of electrical contact pads is greater than one third of the width of each of the electrical contact pads.
7 . The packaging substrate of claim 1 , wherein the conductive bump pad has a pad surface flush with the second surface of the routing structure.
8 . The packaging substrate of claim 1 , wherein the conductive bump pad has a pad surface lower than the second surface of the routing structure.
9 . An electronic package, comprising: the packaging substrate of claim 1 ; and an electronic element disposed on the plurality of electrical contact pads via a plurality of conductive bumps, wherein at least one of the conductive bumps is bonded to the conductive bump pad.
10 . The electronic package of claim 9 , wherein the conductive bumps are made of solder material.
11 . A method of fabricating an electronic package, comprising: providing the packaging substrate of claim 1 ; and disposing an electronic element on the plurality of electrical contact pads via a plurality of conductive bumps, wherein at least one of the conductive bumps is bonded to the conductive bump pad.
12 . The method of claim 11 , wherein the conductive bumps are made of solder material.
13 . A method of fabricating a packaging substrate, comprising: providing a carrier having a metal layer; forming at least a conductive bump pad on the metal layer, wherein a material for forming the conductive bump pad is different from a material for forming the metal layer; forming a circuit layer on the metal layer, wherein the circuit layer has a plurality of electrical contact pads, and the conductive bump pad is covered by at least one of the plurality of electrical contact pads, wherein the material for forming the conductive bump pad is different from a material for forming the electrical contact pads; forming a routing structure on the metal layer, wherein the routing structure has a first surface and a second surface opposing the first surface, wherein the routing structure comprises an insulating layer formed on the metal layer and the circuit layer, and a routing layer formed on the insulating layer and electrically connected to the circuit layer; and removing the carrier and the metal layer thereon to expose the electrical contact pads of the circuit layer and the conductive bump pad, wherein a width of the conductive bump pad is less than a width of each of the electrical contact pads.
14 . The method of claim 13 , wherein the material for forming the conductive bump pad is nickel, and the material for forming the electrical contact pads is copper.
15 . The method of claim 13 , wherein the conductive bump pad is embedded in each of the electrical contact pads.
16 . The method of claim 13 , wherein the insulating layer is formed with a recess at each of the electrical contact pads, and the conductive bump pad is located in the recess.
17 . The method of claim 16 , wherein a distance between the conductive bump pad and a wall of the recess is greater than one third of the width of each of the electrical contact pads.
18 . The method of claim 13 , wherein a width of the insulating layer between two adjacent ones of the plurality of electrical contact pads is greater than one third of the width of each of the electrical contact pads.
19 . The method of claim 13 , wherein the conductive bump pad has a pad surface flush with the second surface of the routing structure.
20 . The method of claim 13 , wherein the conductive bump pad has a pad surface lower than the second surface of the routing structure.

Description

BACKGROUND 1. Technical Field The present disclosure relates to a semiconductor packaging process, and more particularly, to an electronic package, a packaging substrate and a fabricating method thereof. 2. Description of Related Art With the vigorous development of the electronic industry, electronic products tend to be lighter, thinner and smaller in form, and are developing toward high performance, high function and high speed in terms of function. Besides, in order to meet the high integration and miniaturization requirements of semiconductor devices, packaging substrates with high-density and fine-pitch circuits are usually used in the packaging process. As shown in FIG. 1, in a conventional semiconductor package 1, a packaging substrate 10 having a plurality of electrical contact pads 100 is flip-chip bonded to a semiconductor chip 11 via solder bumps 13, and then the solder bumps 13 are covered by an underfill 14. However, during the reflow process, part of solder bumps 130 are prone to overflow to other places to bridge two adjacent ones of the electrical contact pads 100, resulting in electrical short circuit of the semiconductor chip 11. In addition, part of solder bumps 131 are likely to be displaced due to being squeezed by the semiconductor chip 11 during the reflow process, so that the solder bumps 131 are empty (e.g., empty soldering) and cannot be accurately connected to the electrical contact pads 100, resulting in the electrical disconnection of the semiconductor chip 11. Therefore, how to overcome the aforementioned drawbacks of the prior art has become an urgent issue to be addressed at present. SUMMARY In view of the various shortcomings of the prior art, the present disclosure provides a packaging substrate, which comprises: a routing structure having a first surface and a second surface opposing the first surface, and comprising an insulating layer and a routing layer formed on the insulating layer; a circuit layer embedded in the insulating layer of the second surface of the routing structure and electrically connected to the routing layer, wherein the circuit layer has a plurality of electrical contact pads exposed from the insulating layer; and a conductive bump pad disposed on at least one of the plurality of electrical contact pads, wherein a width of the conductive bump pad is less than a width of each of the electrical contact pads, and a material for forming the conductive bump pad is different from a material for forming the electrical contact pads. The present disclosure also provides a method of fabricating a packaging substrate, the method comprises: providing a carrier having a metal layer; forming at least a conductive bump pad on the metal layer, wherein a material for forming the conductive bump pad is different from a material for forming the metal layer; forming a circuit layer on the metal layer, wherein the circuit layer has a plurality of electrical contact pads, and the conductive bump pad is covered by at least one of the plurality of electrical contact pads, wherein the material for forming the conductive bump pad is different from a material for forming the electrical contact pads; forming a routing structure on the metal layer, wherein the routing structure has a first surface and a second surface opposing the first surface, wherein the routing structure comprises an insulating layer formed on the metal layer and the circuit layer, and a routing layer formed on the insulating layer and electrically connected to the circuit layer; and removing the carrier and the metal layer thereon to expose the electrical contact pads of the circuit layer and the conductive bump pad, wherein a width of the conductive bump pad is less than a width of each of the electrical contact pads. In the aforementioned packaging substrate and method, the material for forming the conductive bump pad is nickel, and the material for forming the electrical contact pads is copper. In the aforementioned packaging substrate and method, the conductive bump pad is embedded in each of the electrical contact pads. In the aforementioned packaging substrate and method, the insulating layer is formed with a recess at each of the electrical contact pads, and the conductive bump pad is located in the recess. For instance, a distance between the conductive bump pad and a wall of the recess is greater than one third of the width of each of the electrical contact pads. In the aforementioned packaging substrate and method, a width of the insulating layer between two adjacent ones of the plurality of electrical contact pads is greater than one third of the width of each of the electrical contact pads. In the aforementioned packaging substrate and method, the conductive bump pad has a pad surface flush with the second surface of the routing structure. In the aforementioned packaging substrate and method, the conductive bump pad has a pad surface lower than the second surface of the routing structure. The pre