US-12622309-B2 - Platinum-based solder body contacts for integration of a first substrate with a second substrate

Abstract

One exemplary method of forming a semiconductor structure having a platinum-based solder body contact includes providing a semiconductor structure having a passivation layer over a surface thereof, the passivation layer having a window exposing a portion of a top metal pad, and forming a barrier metal stack over the passivation layer and the portion of the top metal pad, the barrier metal stack including a tantalum nitride (TaN) layer and a tantalum (Ta) layer. The method further includes forming a solder body contact layer comprising platinum (Pt) over the barrier metal stack, and patterning the solder body contact layer and the barrier metal stack to form the platinum-based solder body contact over the portion of the top metal pad.

Inventors

• Zhirong Tang
• Edward Preisler

Assignees

• NEWPORT FAB. LLC

Dates

Publication Date

20260505

Application Date

20231002

Claims (20)

1. 1 . A method comprising: providing a semiconductor structure having a passivation layer over a surface thereof, said passivation layer having a window exposing a portion of a top metal pad; forming a barrier metal stack over said passivation layer and said portion of said top metal pad, said barrier metal stack comprising a tantalum nitride (TaN) layer and a tantalum (Ta) layer; forming a solder body contact layer comprising platinum (Pt) over said barrier metal stack; patterning said solder body contact layer and said barrier metal stack to form a solder body contact over said portion of said top metal pad.
2. 2 . The method of claim 1 , wherein said top metal pad has first and second lateral ends, and wherein said passivation layer covers said first and second lateral ends while exposing said portion of said top metal pad.
3. 3 . The method of claim 2 , wherein said patterning said solder body contact layer and said barrier metal stack forms said solder body contact over said portion of said top metal pad and over said first and second lateral ends.
4. 4 . The method of claim 1 , wherein said solder body contact layer is one of a Pt layer or a platinum alloy layer.
5. 5 . The method of claim 1 , wherein said top metal pad is an aluminum (Al) pad or a copper (Cu) pad.
6. 6 . The method of claim 1 , wherein said passivation layer comprises an oxide layer and/or a nitride layer.
7. 7 . The method of claim 1 , wherein said passivation layer does not comprise polybenzoxazole (PBO), polyimide (PI), or benzocyclobutene (BCB).
8. 8 . A method comprising: providing a semiconductor structure having a top metal layer formed thereon; forming a barrier metal stack over said top metal layer, said barrier metal stack comprising a tantalum nitride (TaN) layer and a tantalum (Ta) layer; forming a solder body contact layer comprising platinum over said barrier metal stack; substantially concurrently patterning said solder body contact layer and said barrier metal stack to form a solder body contact.
9. 9 . The method of claim 8 , further comprising: forming a passivation layer, wherein said passivation layer is not situated under any portion of said solder body contact; forming a window in said passivation layer, said window exposing a portion of said solder body contact.
10. 10 . The method of claim 9 , wherein said passivation layer comprises an oxide layer and/or a nitride layer.
11. 11 . The method of claim 9 , wherein said passivation layer does not comprise polybenzoxazole (PBO), polyimide (PI), or benzocyclobutene (BCB).
12. 12 . The method of claim 8 , wherein said solder body contact layer is one of a Pt layer or a platinum alloy layer.
13. 13 . The method of claim 8 , wherein said top metal layer is an aluminum (Al) layer or a copper (Cu) layer.
14. 14 . A semiconductor structure comprising: a passivation layer formed over a surface of said semiconductor structure, said passivation layer having a window exposing a portion of a top metal pad; a patterned barrier metal stack formed over said top metal pad in said window, said patterned barrier metal stack comprising a tantalum nitride (TaN) segment formed over a tantalum (Ta) segment; a solder body contact comprising platinum (Pt) formed over said patterned barrier metal stack.
15. 15 . The semiconductor structure of claim 14 , wherein said top metal pad has first and second lateral ends, and wherein said passivation layer is situated over said first and second lateral ends while exposing said portion of said top metal pad.
16. 16 . The semiconductor structure of claim 14 , wherein said solder body contact is situated over said portion of said top metal pad and over said first and second lateral ends.
17. 17 . The semiconductor structure of claim 14 , wherein said solder body contact is one of a Pt contact or a platinum alloy contact.
18. 18 . The semiconductor structure of claim 14 , wherein said top metal pad is an aluminum (Al) pad or a copper (Cu) pad.
19. 19 . The semiconductor structure of claim 14 , wherein said passivation layer comprises an oxide layer and/or a nitride layer.
20. 20 . The semiconductor structure of claim 14 , wherein said passivation layer does not comprise polybenzoxazole (PBO), polyimide (PI), or benzocyclobutene (BCB).

Description

CLAIM OF PRIORITY The present application is a continuation-in-part of and claims the benefit of and priority to application Ser. No. 17/967,107 filed on Oct. 17, 2022, titled “efficient integration of a first substrate without solder bumps with a second substrate having solder bumps.” The disclosure and content of the above-identified application is hereby incorporated fully by reference into the present application. BACKGROUND Solder bodies, such as solder bumps for example, are commonly utilized in semiconductor structures to mechanically and electrically connect devices in different substrates. Such connection can assist with pixel readout, signal processing, memory storage, etc. However, a complex, time consuming, and expensive fabrication process is required to provide a processed wafer with solder bodies. In order to connect to solder bodies, the processed wafer is often equipped with under-bump metallizations (UBMs) over the top interconnect metals to provide metallurgical compatibility with solder bodies. However, UBMs disadvantageously increase fabrication complexity. Forming UBMs in processed wafers adds several processing steps. Due to the types of materials used, the processed wafer is often transferred to a second specialized foundry in order to form UBMs. Overall, forming UBMs and making the processed wafers compatible with solder bodies can add approximately two to three months to the fabrication process. Although it is possible for solder bodies to be bumped or reflowed directly on a platinum (Pt) metal contact, to form a flip-chip package for example, at the typical silicon backend process temperature of approximately four hundred degrees centigrade (400° C.) Pt can react with the aluminum (Al) often used to provide a top interconnect metal pad. The reaction may undesirably form a Pt—Al intermetallic compound that can affect the strength and reliability of the solder body's attachment to the Pt metal contact. Unfortunately, the barrier metals titanium (Ti) and titanium nitride (TiN) used in many silicon processes have been found to be substantially ineffective in blocking the up-diffusion of Al to reach and react with the Pt metal contact. Thus, there is a need in the art for a solution for preventing an Al top metal pad from reacting with a Pt metal contact that is situated over the Al top metal pad. SUMMARY The present disclosure is directed to platinum-based solder body contacts for integration of a first substrate with a second substrate, substantially as shown in and/or described in connection with at least one of the figures, and as set forth in the claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 illustrates conventional first and second substrates, and an enlarged view of a portion of the first substrate. FIG. 2 illustrates a flowchart of an exemplary method for forming a semiconductor structure having a platinum-based solder body contact according to one implementation of the present application. FIG. 3 illustrates a semiconductor structure processed in accordance with the flowchart of FIG. 2 according to one implementation of the present application. FIG. 4 illustrates a semiconductor structure processed in accordance with the flowchart of FIG. 2 according to one implementation of the present application. FIG. 5 illustrates a semiconductor structure processed in accordance with the flowchart of FIG. 2 according to one implementation of the present application. FIG. 6 illustrates a semiconductor structure processed in accordance with the flowchart of FIG. 2 according to one implementation of the present application. FIG. 7 illustrates a semiconductor structure processed in accordance with the flowchart of FIG. 2 according to another implementation of the present application. FIG. 8 illustrates a flowchart of an exemplary method for forming a semiconductor structure having a platinum-based solder body contact according to another implementation of the present application. FIG. 9 illustrates a semiconductor structure processed in accordance with the flowchart of FIG. 8 according to one implementation of the present application. FIG. 10 illustrates a semiconductor structure processed in accordance with the flowchart of FIG. 8 according to one implementation of the present application. FIG. 11 illustrates a semiconductor structure processed in accordance with the flowchart of FIG. 8 according to one implementation of the present application. FIG. 12 illustrates a semiconductor structure processed in accordance with the flowchart of FIG. 8 according to one implementation of the present application. FIG. 13 illustrates a semiconductor structure processed in accordance with the flowchart of FIG. 8 according to one implementation of the present application. FIG. 14 illustrates a semiconductor structure processed in accordance with the flowchart of FIG. 8 according to one implementation of the present application. DETAILED DESCRIPTION The following description contains specific information