US-12622336-B2 - Bonding layer and process

Abstract

A method includes providing a first bonding surface on a first substrate, the first bonding surface including a bonding layer that is thermally curable or photocurable. The method includes providing a second bonding surface on a second substrate. The method includes bonding the first substrate to the second substrate by making physical contact between the first bonding surface and second bonding surface. The method further includes applying thermal energy or light to the bonding layer.

Inventors

• Scott Lefevre
• Adam Gildea
• Satohiko Hoshino
• Sophia MADELONE
• Yuji MIMURA

Assignees

• TOKYO ELECTRON LIMITED

Dates

Publication Date

20260505

Application Date

20230519

Claims (19)

1. 1 . A method, comprising: providing a first bonding surface on a first substrate, the first bonding surface including a bonding layer that is thermally curable or photocurable; providing a second bonding surface on a second substrate; bonding the first substrate to the second substrate by making physical contact between the first bonding surface and the second bonding surface; and applying thermal energy or light to the bonding layer, wherein applying the thermal energy or the light covalently bonds the bonding layer to the first substrate at the first bonding surface and to the second substrate at the second bonding surface, respectively.
2. 2 . The method of claim 1 , wherein the bonding layer is a first bonding layer, wherein the second bonding surface includes a second bonding layer that is thermally curable or photocurable.
3. 3 . The method of claim 1 , wherein applying the light includes implementing UV radiation at a wavelength of 210 nm to 260 nm.
4. 4 . The method of claim 1 , wherein applying the thermal energy includes heating the bonding layer at a temperature of at least 250° C.
5. 5 . The method of claim 1 , wherein the bonding layer includes a precursor molecule having a silicon-containing ring structure.
6. 6 . The method of claim 5 , wherein the bonding layer includes disilacyclobutanes (DSCB).
7. 7 . The method of claim 1 , wherein the first substrate includes a conductive feature disposed in a dielectric layer, and wherein providing the first bonding surface includes: depositing a bonding layer over the first substrate; and removing a portion of the bonding layer to expose the conductive feature such that the first bonding surface includes the conductive feature and a remaining portion of the bonding layer.
8. 8 . The method of claim 7 , further comprising recessing a top portion of the conductive feature such that the bonding layer protrudes from the recessed conductive feature, wherein applying the thermal energy causes the recessed conductive feature to expand toward the second bonding surface.
9. 9 . A method, comprising: providing a first bonding surface on a first substrate, the first bonding surface including a first bonding layer that is thermally curable or photocurable; providing a second bonding surface on a second substrate, the second bonding surface including a second bonding layer; bonding the first substrate to the second substrate by making physical contact between the first bonding layer and the second bonding layer; and applying thermal energy or light to the first bonding layer and the second bonding layer.
10. 10 . The method of claim 9 , wherein the second bonding layer is thermally curable or photocurable.
11. 11 . The method of claim 9 , wherein the first bonding layer is thermally curable, and wherein applying the thermal energy is implemented at a temperature at least 250° C.
12. 12 . The method of claim 9 , wherein the first bonding layer is photocurable, the method further comprising performing an annealing process after applying the light.
13. 13 . The method of claim 12 , wherein applying the light includes implementing UV radiation at a wavelength of 210 nm to 260 nm.
14. 14 . The method of claim 9 , wherein applying the thermal energy or the light includes: forming first covalent bonds at a first interface between the first bonding layer and the first substrate; forming second covalent bonds at a second interface between the second bonding layer and the second substrate; and forming third covalent bonds at a third interface between the first bonding layer and the second bonding layer.
15. 15 . The method of claim 14 , wherein at least one of the first, the second, and the third covalent bonds include a carbosilane linkage.
16. 16 . The method of claim 9 , wherein the first bonding layer includes a precursor molecule having a silicon-containing ring structure.
17. 17 . The method of claim 16 , wherein the silicon-containing ring structure is coupled to an aryl group.
18. 18 . A semiconductor structure, comprising: a first substrate; a second substrate; and a bonding layer bonding the first substrate to the second substrate, the bonding layer including a polymer-based material that includes carbosilane linkages.
19. 19 . The semiconductor structure of claim 18 , wherein the bonding layer includes disilacyclobutanes (DSCB).

Description

CROSS-REFERENCE TO RELATED APPLICATION The present application claims priority to U.S. Provisional Application No. 63/426,140, filed on Nov. 17, 2022, and titled “BONDING LAYER AND PROCESS,” the entire disclosure of which is incorporated herein by reference for all purposes. FIELD OF THE DISCLOSURE This disclosure relates to methods of semiconductor manufacturing and more particularly to the bonding of multiple semiconductor substrates. BACKGROUND Wafer-to-wafer, chip-to-chip, and chip to wafer bonding (generally, substrate bonding) is being implemented to continue Power-Performance-Area-Cost (PPAC) scaling for complex circuits such as are implemented in Systems on Chip (SOCs). Many bonding techniques, such as direct and hybrid bonding, often utilize high pressure and/or temperature to achieve reliable oxide-to-oxide bonding adhesion between the substrates. Lower temperature bonding technologies with excellent adhesion are desired. FIG. 1 illustrates some of the steps of a conventional process for bonding two semiconductor substrates (e.g., wafers) to form a semiconductor structure 100, though the process is abbreviated and simplified here as it is well known and merely for illustration purposes. A semiconductor substrate 101 includes a base substrate 102 and a plurality of active devices, metallization, and other circuitry features disposed within and/or over the base substrate 102. A dielectric layer 104 is formed over the base substrate 102. The conductive feature 106 may include copper (Cu). The conductive features 106 are formed at or below a bonding surface 108 of the dielectric layer 104. The bonding surface 108 is configured to engage and bond with another bonding surface 108 disposed over a different semiconductor substrate 101 to form the semiconductor structure 100. The dielectric layer 104 may include an oxide, a nitride, a carbide, the like, or combinations thereof, as is well known and described elsewhere. The conductive features 106 are often recessed to below the bonding surface 108 to ensure that, when two bonding surfaces are brought together, a strongly bonded dielectric-to-dielectric interface is formed prior to the conductive features 106 protruding and contacting each other across a bonding interface 110 therebetween. Referring to FIG. 1A, the bonding surface(s) 108 are activated using a plasma (e.g. such as an N2 plasma and/or an O2 plasma) to prepare the surfaces for bonding. Referring to FIG. 1B, hydration is often provided to further enhance the bonding capabilities of the bonding surface(s) 108. Referring to FIG. 1C, the bonding surfaces 108 of two semiconductor substrates 101 are aligned and brought into contact at the bonding interface 110. An anneal step, as shown in FIG. 1D, may improve the dielectric-to-dielectric bond and/or causes the conductive contacts to expand toward each other and create a physical and electrical contact as part of the semiconductor structure 100. One or both substrates may be thinned (not shown) as needed for a given application. The existing bonding process can be complex and expensive to perform. Creating Si—O linkages (between two opposing dielectric layers) at the bonding interface may rely on the implementation of plasma activation as described in FIG. 1A, followed by treatment with water as described in FIG. 1B. In some instances, such treatment processes may suffer from queue time lag limitations. Moreover, the bonding interface may exhibit limited bonding strength and may be reversible using certain techniques, such as inserting a blade at the bonding interface. In some instances, the bonding strength may be weakened due to environment or processing issues. The hydration step (as shown in FIG. 1B) may also be problematic in that it may cause oxidation of copper-based conductive features, which increases their resistivity. Thus, alternative procedures for implementing a direct or hybrid bonding process without relying on activation and hydration processes are desired. SUMMARY Described herein are structures and techniques that provide for improved bonding (e.g., hybrid bonding) between substrates. According to one implementation, a direct covalent bond is formed between two surfaces either via thermal or UV activation with the option of omitting surface treatment (e.g., plasma activation and/or treatment with water), thereby reducing queue time requirement during fabrication process. In one aspect, the present disclosure provides a method that includes providing a first bonding surface on a first substrate, the first bonding surface including a bonding layer that is thermally curable or photocurable. The method includes providing a second bonding surface on a second substrate. The method includes bonding the first substrate to the second substrate by making physical contact between the first bonding surface and second bonding surface. The method further includes applying thermal energy or light to the bonding layer. In some implementations, rec