US-12623317-B2 - Polishing tool and method

US12623317B2US 12623317 B2US12623317 B2US 12623317B2US-12623317-B2

Abstract

Provided is a polishing tool and a methods for polishing a wafer or manufacturing a semiconductor device. A method for polishing a wafer includes contacting a surface of the wafer to a polishing pad at an interface; rotating the wafer and/or the pad; and delivering a series of selected treatment agents to the interface and removing waste from the interface through channels extending through the pad, while controlling a rate of delivering the selected polishing agents and removing the waste streams through the channels formed in the pad to optimize polishing of the wafer.

Inventors

Te-Chien Hou
Chi-hsiang Shen
Chen-Chi Tang
Shich-Chang Suen

Assignees

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Dates

Publication Date: 20260512
Application Date: 20230516

Claims (20)

1 . A method for polishing a wafer, the method comprising: contacting a surface of the wafer to a polishing pad at an interface, wherein channels are formed in the pad that extend from a bottom surface to a top surface of the pad; rotating the wafer and/or the pad; and delivering a series of selected treatment agents to the interface and removing waste from the interface through the channels extending through the pad, while controlling a rate of delivering the selected polishing agents and removing the waste streams through the channels formed in the pad to optimize polishing of the wafer, wherein controlling the rate of delivering the selected polishing agents comprises independently controlling flow rates to different radial zones of the wafer through separate groups of channels, wherein the separate groups of channels are positioned to deliver treatment agents to different radial zones.
2 . The method of claim 1 , wherein the polishing pad is formed with first columns of a first material, and second columns of a second material harder than the first material, and columns of aligned voids, the columns of aligned voids forming the channels, wherein the first columns and second columns are interspersed between the columns of aligned voids.
3 . The method of claim 1 , wherein the polishing pad is formed by three-dimensional printing.
4 . The method of claim 1 , wherein the polishing pad is located on a platen, and wherein the series of selected treatment agents passes through the platen into the polishing pad.
5 . The method of claim 1 , wherein the method comprises rotating the wafer and rotating the pad.
6 . The method of claim 1 , wherein the selected treatments agents are selected from the group consisting of a chemical mechanical polishing slurry, a cleaning chemical, an abrasive source, an additive source, and a peroxide solution.
7 . A method for polishing an object, the method comprising: providing a rotatable polishing pad with a pixel-level controlled structure formed by three-dimensional printing and having a top surface and a bottom surface, wherein channels are formed by pixels comprising voids arranged in columns extending through the pad from the bottom surface to the top surface; providing a polishing tool including the rotatable polishing pad, wherein a polishing agent is in fluid communication with the top surface via the channels through the polishing pad; contacting the object with the top surface of the polishing pad; and spinning the polishing pad while injecting the polishing agent through the channels in the polishing pad to the top surface.
8 . The method of claim 7 , wherein the polishing pad is formed with columns of a first material and columns of a second material harder than the first material.
9 . The method of claim 7 , wherein each pixel has a predetermined hardness value selected from a range of 5 shore A to 80 shore D.
10 . The method of claim 7 , wherein the polishing pad is located on a platen, and wherein the polishing agent passes through the platen into the polishing pad.
11 . The method of claim 7 , further comprising removing polishing agent waste from the surface through the channels of the polishing pad.
12 . The method of claim 11 , further comprising rotating the object.
13 . A method for manufacturing a semiconductor device, the method comprising: contacting a surface of a wafer to a top surface of a pad at an interface, wherein the pad is formed with columns of aligned voids, the columns of aligned voids forming channels defining discrete flow paths that extend continuously from a bottom surface to the top surface of the pad; rotating the wafer and/or the pad; and delivering a treatment agent to the interface through the channels extending through the pad.
14 . The method of claim 13 , wherein the treatment agent is a chemical mechanical polishing slurry.
15 . The method of claim 13 , wherein the pad is located on a platen, wherein the platen includes channels, and wherein the channels of the pad and the channels of the platen are aligned to form pathways through which the treatment agent is delivered to the interface.
16 . The method of claim 13 , further comprising removing waste from the interface through a second channel of the channels extending through the pad.
17 . The method of claim 13 , wherein the treatment agent is a first treatment agent, and wherein the method further comprises delivering a second treatment agent to the interface through the pad.
18 . The method of claim 17 , further comprising delivering a third treatment agent to the interface through the pad.
19 . The method of claim 17 , wherein the first treatment agent is a chemical mechanical polishing slurry, and wherein the second treatment agent is selected from a cleaning chemical, an abrasive source, an additive source, and a peroxide solution.
20 . The method of claim 13 , further comprising controlling the rate of delivering the treatment agent to the interface by independently controlling flow rates to different radial zones of the surface of the wafer through separate groups of channels, each group of channels being positioned to supply a corresponding radial zone of the wafer.

Description

BACKGROUND Semiconductor or integrated circuit (IC) devices are constructed using complex fabrication processes that form a plurality of different layers on top of one another. Many of the layers are patterned using photolithography, in which a light sensitive photoresist material is selectively exposed to light. For example, photolithography is used to define back-end metallization layers that are formed on top of one another. To ensure that the metallization layers are formed with a good structural definition, the patterned light must be properly focused. To properly focus the pattered light, a workpiece must be substantially planar to avoid depth of focus problems. Chemical mechanical polishing (CMP) is a widely used process by which both chemical and mechanical forces are used to globally planarize a semiconductor workpiece. The planarization prepares the workpiece for the formation of a subsequent layer. A typical CMP tool comprises a rotating platen covered by a polishing pad. A slurry distribution system is configured to provide a polishing mixture, having chemical and abrasive components, to the polishing pad. A workpiece is then brought into contact with the rotating polishing pad to planarize the workpiece. CMP is a favored process because it achieves global planarization across the entire wafer surface. The CMP process polishes and removes materials from the wafer, and works on multi-material surfaces. Furthermore, the CMP process avoids the use of hazardous gasses, and/or is usually a low-cost process. BRIEF DESCRIPTION OF THE DRAWINGS Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It should be noted that, in accordance with the standard practice in the industry, various features may not be drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion. FIG. 1 is a schematic view of a Chemical Mechanical Polishing (CMP) tool in accordance with some embodiments. FIG. 2 is a perspective view of a polishing location in the CMP tool of FIG. 1 in accordance with some embodiments. FIGS. 3-6 are cross-sectional schematic view of a wafer being transported to, and polished at, a polishing location in accordance with some embodiments. FIG. 7 is cross-sectional schematic view of a wafer, polishing pad, and platen at a polishing location in accordance with some embodiments. FIG. 8 is cross-sectional schematic view of a wafer, polishing pad, and platen at a polishing location in accordance with some embodiments. FIG. 9 is a flow chart illustrating a method for polishing an object, such as while manufacturing a semiconductor device, in accordance with some embodiments. DETAILED DESCRIPTION The following disclosure provides many different embodiments, or examples, for implementing different features of the subject matter provided. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For the sake of brevity, conventional techniques related to conventional semiconductor device fabrication may not be described in detail herein. Moreover, the various tasks and processes described herein may be incorporated into a more comprehensive procedure or process having additional functionality not described in detail herein. In particular, various processes in the fabrication of semiconductor devices are well-known and so, in the interest of brevity, many conventional processes will only be mentioned briefly herein or will be omitted entirely without providing the well-known process details. As will be readily apparent to those skilled in the art upon a complete reading of the disclosure, the structures disclosed herein may be employed with a variety of technologies, and may be incorporated into a variety of semiconductor devices and products. Further, it is noted that semiconductor device structures include a varying number of components and that single components shown in the illustrations may be representative of multiple components. Furthermore, spatially relative terms, such as “over”, “overlying”, “above”, “upper”, “top”, “under”, “underlying”, “below”, “lower”, “bottom”, and the like, may be used herein for ease of description to describe one element's or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly. When a spatially relative term, such as those listed above, is used to describe a first element with respect to a second element, the first element may be direc