US-12623900-B1 - MEMS with over-voltage protection

US12623900B1US 12623900 B1US12623900 B1US 12623900B1US-12623900-B1

Abstract

A semiconductor device includes first and second exposed electrical contacts and a cavity having a microelectromechanical system (MEMS) structure therein. A conductive path extends from the first exposed electrical contact to the cavity and an over-voltage protection element electrically is coupled between the first and second exposed electrical contacts.

Inventors

Nicholas Miller
Ginel C. Hill
Charles I. Grosjean
Michael Julian Daneman
Paul M. Hagelin
Aaron Partridge

Assignees

SITIME CORPORATION

Dates

Publication Date: 20260512
Application Date: 20220323

Claims (20)

1 . A semiconductor device comprising: a microelectromechanical systems (MEMS) resonator having a body adapted to vibrate, the body being hermetically sealed within a cavity of the semiconductor device; first and second electrical contacts disposed on an exterior surface of the semiconductor device; an electrode within the cavity of the semiconductor device, the electrode being electrically coupled to the first electrical contact to receive drive impetus therefrom, the drive impetus to cause the body to vibrate; an over-voltage protection device electrically coupled between the first and second electrical contacts.
2 . The semiconductor device of claim 1 , wherein the body comprises a layer of degenerately-doped silicon and a layer of a piezoelectric material.
3 . The semiconductor device of claim 2 , wherein the layer of degenerately-doped silicon is doped with an N-type dopant and wherein the electrode comprises the layer of degenerately-doped silicon.
4 . The semiconductor device of claim 1 , wherein the body comprises highly-doped crystal silicon and wherein the over-voltage protection device comprises a bipolar junction transistor having a first polar region at least partially formed from highly-doped crystal silicon.
5 . The semiconductor device of claim 1 , wherein the over-voltage protection device comprises a bipolar junction transistor having a first polar region at least partially formed from highly-doped crystal silicon, wherein the semiconductor device comprises a bonded lid also having a layer of the highly-doped crystal silicon, and wherein the bonded lid further comprises an isolation trench to electrically isolate a second polar region of the bipolar junction transistor from the layer of the highly-doped crystal silicon.
6 . The semiconductor device of claim 1 , wherein the over-voltage protection device comprises a bipolar junction transistor having a first polar region at least partially formed from highly-doped crystal silicon, and wherein the semiconductor device comprises a deposited lid layer, also comprising the highly-doped crystal silicon, and wherein an isolation trench is defined in the deposited lid layer to electrically isolate a second polar region of the bipolar junction transistor from the layer of the highly-doped crystal silicon.
7 . The semiconductor device of claim 1 wherein the over-voltage protection device comprises diodes which are electrically arranged back-to-back, each of the diodes having a first polar region at least partially formed from highly-doped silicon, wherein the semiconductor device comprises a bonded lid also having a layer of the highly-doped silicon, and wherein the bonded lid further comprises an isolation trench to electrically isolate a second polar region of the each of the diodes from the layer of the highly-doped silicon.
8 . The semiconductor device of claim 7 , wherein the isolation trench is filled with a silicon-oxide material.
9 . The semiconductor device of claim 1 wherein the over-voltage protection device comprises diodes which are electrically arranged back-to-back, each of the diodes having a first polar region at least partially formed from highly-doped silicon, wherein the semiconductor device comprises a deposited lid layer, also comprising the highly-doped silicon, and wherein an isolation trench is formed in the deposited lid layer to electrically isolate a second polar region of the each of the diodes from the layer of the highly-doped silicon.
10 . The semiconductor device of claim 1 , wherein the semiconductor device comprises a layer of highly-doped crystal silicon, wherein at least one of the body and the electrode is at least partially formed from the layer of highly-doped crystal silicon, wherein the over-voltage protection device comprises a bipolar device having a first polar region and a second polar region, the first polar region comprises a portion of the layer of highly-doped crystal silicon, the semiconductor device further having an isolation region which electrically isolates the second polar region from the layer of high-doped crystal silicon, wherein the first polar region is in electrical communication with the first electrical contact and wherein the second polar region is in electrical communication with the second electrical contact.
11 . The semiconductor device of claim 1 , wherein the electrode is a first electrode and wherein the semiconductor device comprises a second electrode, the first electrode to electrostatically-drive the MEMS resonator to resonant motion, the second electrode to electrostatically-sense motion of the MEMS resonator and to provide an electrical output dependent thereon, each of the first electrode and the second electrode operatively disposed adjacent a boundary of said cavity, the body disposed within the cavity between the first electrode and the second electrode.
12 . The semiconductor device of claim 11 , wherein the second electrode is electrically coupled to the second electrical contact, such that the second electrical output provides a terminal for the electrical output dependent on the sensed motion of the MEMS resonator.
13 . The semiconductor device of claim 1 , wherein the electrode is a first electrode, wherein the semiconductor device comprises a second electrode which is operatively coupled to the second electrical contact, wherein the MEMS resonator is mechanically supported by a silicon substrate, wherein one of the first electrical contact and the second electrical contact is formed on an exterior surface of the silicon substrate, and wherein a through-silicon via is defined through the silicon substrate, to electrically couple at least one of: the first electrode with the first electrical contact; or the second electrode with the second electrical contact.
14 . A semiconductor device comprising: a microelectromechanical systems (MEMS) resonator having a body adapted to vibrate, the body being hermetically sealed within a cavity of the semiconductor device; first and second electrical contacts disposed on an exterior surface of the semiconductor device; wherein the body has a layer of degenerately-doped silicon and a piezoelectric layer, the layer of degenerately-doped silicon to serve as an electrode within the cavity of the semiconductor device, and being electrically coupled to the first electrical contact to receive drive impetus therefrom, the drive impetus to cause the body to vibrate; an over-voltage protection device electrically coupled between the first and second electrical contacts.
15 . The semiconductor device of claim 14 , wherein the semiconductor device comprises a silicon crystal substrate that provides at least one of mechanical support for the MEMS resonator or encapsulation of the cavity relative to a second substrate, and wherein the over-voltage protection device comprises first and second polar regions, each defined by respective, doped portions of the silicon crystal substrate.
16 . A semiconductor device comprising: a microelectromechanical systems (MEMS) resonator having a body adapted to vibrate, the body being hermetically sealed within a cavity of the semiconductor device; first and second electrical contacts disposed on an exterior surface of the semiconductor device; wherein the body is separated within the cavity from a drive electrode by a gap, and is also separated from a sense electrode within the cavity by a gap, the body having a layer of degenerately-doped silicon, the drive electrode being electrically coupled to the first electrical contact to receive drive impetus therefrom, the drive impetus to cause the body to vibrate; an over-voltage protection device electrically coupled between the first and second electrical contacts.
17 . The semiconductor device of claim 16 , wherein the second electrode is electrically coupled to the second electrical contact, such that the second electrical output provides a terminal for output of an electrical output dependent on the sensed motion of the MEMS resonator.
18 . The semiconductor device of claim 16 , wherein the semiconductor device comprises a silicon crystal substrate that provides at least one of mechanical support for the MEMS resonator or encapsulation of the cavity relative to a second substrate, and wherein the over-voltage protection device comprises first and second polar regions, each defined by respective, doped portions of the silicon crystal substrate.
19 . The semiconductor device of claim 16 , wherein the second electrical contact is to be couped to a fixed electrical potential during operation of the MEMS resonator.
20 . A semiconductor device comprising: a microelectromechanical systems (MEMS) resonator having a body, the body adapted to vibrate and being hermetically sealed within a cavity of the semiconductor device, the body being at least partially formed from degenerately-doped silicon; first and second electrical contacts disposed on an exterior surface of the semiconductor device; an electrode within the cavity of the semiconductor device, the electrode being electrically coupled to the first electrical contact to receive drive impetus therefrom, the drive impetus to cause the body to vibrate; an over-voltage protection device electrically coupled between the first and second electrical contacts; wherein the over-voltage protection device comprises first and second polar regions, the first polar region being formed from the degenerately-doped silicon.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application is a division of U.S. patent application Ser. No. 16/915,696, filed on Jun. 29, 2020, on behalf of first-named inventor Nicholas Miller for “Mems With Over-Voltage Protection,” which in turn a division of U.S. patent application Ser. No. 15/911,045, filed on Mar. 2, 2018, on behalf of first-named inventor Nicholas Miller for “Mems With Over-Voltage Protection” (now U.S. Pat. No. 10,737,934), which in turn claims priority to U.S. Provisional Patent Application No. 62/465,894 filed Mar. 2, 2017; each aforementioned patent application is hereby incorporated by reference. TECHNICAL FIELD The disclosure herein relates to microelectromechanical systems (MEMS). DRAWINGS The various embodiments disclosed herein are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which: FIG. 1 illustrates various exemplary configurations of over-voltage protection elements with respect to a chambered MEMS element; FIG. 2 illustrates exemplary over-voltage protection device (OPD) implementations within a silicon lid-layer and also within the single-crystal silicon layer of a device-layer material stack; FIG. 3 illustrates exemplary sizing and geometric characteristics bearing on OPD design; FIG. 4 illustrates an interdigitation geometry that enables formation of relatively lengthy back-to-back n-p junctions within a compact OPD footprint; FIGS. 5 and 6 illustrate alternative interdigitated OPD embodiments; FIG. 7 contrasts current conduction path lengths within a generalized dopant diffusion profile with those in a path-matched dopant diffusion geometry; FIG. 8 illustrates an exemplary conductor-to-cathode interconnect implemented with a material that intrinsically equilibrates current flow through the OPD; FIG. 9 illustrates a top-view of an interdigitated diode pair in which metal contact fingers are ballasted by heavily-doped polysilicon cathode-interconnect structures; FIGS. 10 and 11 illustrate exemplary embodiments of through-silicon OPD structures; FIGS. 12-14 illustrate alternative structures for electrically isolating the floating p-type region of an OPD; and FIG. 15 illustrates exemplary interconnections between contacts (terminals) and over-voltage protection devices implemented in various silicon layers of a MEMS device. DETAILED DESCRIPTION MEMS devices having voltage-stress-protected contacts coupled to electrodes within or adjacent a sealed interior chamber are disclosed in various embodiments herein. In a number of implementations, a MEMS resonator within the sealed chamber may be rendered to resonant motion by an actuation signal conducted via one or more of the exposed contacts-motion that produces a periodic output signal conducted from a sense electrode on or near the resonator to another of the exposed contacts. Over-voltage protection elements coupled respectively to the actuation signal contact and output signal contact (and extending, for example, from those contacts to a ground or other reference voltage node) limit the contact voltage to a target voltage-stress threshold, breaking down and conducting/discharging current when the voltage between the signal contact (actuation or output) and reference node rises above the threshold. In other embodiments, particularly those in which the voltage across a pair of signal contacts will develop across the resonator or other MEMS element, an over-voltage protection element may be coupled directly between the signal contact pair thus limiting the cross-resonator voltage to the target threshold. These and other features and embodiments are described in further detail below. FIG. 1 illustrates various exemplary configurations of over-voltage protection elements (or over-voltage protection devices, OPDs) with respect to a chambered MEMS element-generally depicted and referred to herein as a MEMS resonator, though MEMS thermistors, accelerometer mass structures, optical refractors or any other practicable micromachined element that may benefit from over-voltage protection may be disposed within the chamber (or cavity, enclosure, housing, etc.) and coupled to one or more exposed electrical contacts. In one embodiment, shown schematically at 101, an over-voltage protection device 105 formed by back-to-back n-p semiconductor junctions (i.e., a p-type semiconductor region sandwiched between contact-side n-type regions) is coupled between a pair of exposed contacts VA and VB, in effect forming back-to-back diodes between those contacts (i.e., diodes coupled anode-to-anode in series). Each n-p junction (i.e., “reverse-bias” junction) is characterized by a breakdown voltage (e.g., a Zener or avalanche breakdown effect in which charge conduction is triggered by a potential difference greater than the breakdown threshold) and thus begins conducting above that breakdown threshold. Accordingly, by engin