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US-12624454-B2 - In situ failure detection in semiconductor processing chambers

US12624454B2US 12624454 B2US12624454 B2US 12624454B2US-12624454-B2

Abstract

Exemplary semiconductor processing chambers may include a chamber body defining a substrate processing region. The chambers may include a substrate support positioned within the substrate processing region. The substrate support may include a ceramic or polymeric insulator plate positioned between a cathode assembly and an electrostatic chuck assembly. The chambers may include an acoustic emission probe in contact with the insulator plate of the substrate support.

Inventors

  • Srivatsa Madananth
  • Dhananjai Kumar
  • Yogananda Sarode Vishwanath
  • Jacob Andrews

Assignees

  • APPLIED MATERIALS, INC.

Dates

Publication Date
20260512
Application Date
20191206

Claims (20)

  1. 1 . A semiconductor processing chamber comprising: a chamber body defining a substrate processing region; a substrate support positioned within the substrate processing region, wherein the substrate support comprises a ceramic or polymeric insulator plate positioned between a cathode assembly and an electrostatic chuck assembly, and a facility plate seated on the insulator plate; and an acoustic emission probe in contact with the insulator plate of the substrate support.
  2. 2 . The semiconductor processing chamber of claim 1 , wherein the insulator plate is seated within a ground plate, and wherein the acoustic emission probe extends through the ground plate to contact the insulator plate.
  3. 3 . The semiconductor processing chamber of claim 1 , wherein the insulator plate comprises a polymeric material seated within an annular ceramic support.
  4. 4 . The semiconductor processing chamber of claim 1 , further comprising a plurality of acoustic emission probes in contact with the insulator plate of the substrate support.
  5. 5 . The semiconductor processing chamber of claim 1 , wherein the acoustic emission probe is positioned in contact with a radial edge of the insulator plate.
  6. 6 . The semiconductor processing chamber of claim 1 , wherein the insulator plate defines a barrier between the cathode assembly and the electrostatic chuck assembly, wherein the cathode assembly is maintained at atmospheric pressure, and wherein the electrostatic chuck assembly is maintained at a pressure maintained below or about 50 Torr.
  7. 7 . The semiconductor processing chamber of claim 1 , wherein the acoustic emission probe is configured to monitor emissions through the insulator plate, and wherein the acoustic emission probe is configured to identify emissions above a threshold greater than or about 35 dB.
  8. 8 . A semiconductor processing chamber comprising: a chamber body defining a substrate processing region; a substrate support positioned within the substrate processing region, wherein the substrate support comprises: an electrostatic chuck configured to support a semiconductor substrate, a cooling plate coupled with the electrostatic chuck and configured to receive a temperature controlled fluid at a first temperature, a facility plate operable at a second temperature greater than the first temperature, and a gap formed between the cooling plate and the facility plate within the substrate support; and an acoustic emission probe extending through the facility plate and the cooling plate, wherein the acoustic emission probe is in contact with the electrostatic chuck; wherein the electrostatic chuck is seated on the facility plate at a radial edge of the electrostatic chuck.
  9. 9 . The semiconductor processing chamber of claim 8 , wherein the facility plate maintains the gap along a radial edge of the cooling plate.
  10. 10 . The semiconductor processing chamber of claim 8 , wherein the temperature controlled fluid is maintained at a temperature below or about −50° C.
  11. 11 . The semiconductor processing chamber of claim 8 , wherein a vacuum is maintained within the gap between the cooling plate and the facility plate.
  12. 12 . The semiconductor processing chamber of claim 11 , wherein the facility plate defines a recessed ledge on a surface of the facility plate opposite a surface of the facility plate facing the gap.
  13. 13 . The semiconductor processing chamber of claim 12 , wherein a vacuum seal extends along the recessed ledge and forms a seal between the acoustic emission probe and the facility plate.
  14. 14 . The semiconductor processing chamber of claim 8 , wherein the acoustic emission probe is seated within a recess defined within the electrostatic chuck.
  15. 15 . The semiconductor processing chamber of claim 8 , wherein the acoustic emission probe is configured to detect stress effects within a substrate seated on the substrate support.
  16. 16 . A method of semiconductor processing, the method comprising: performing a process on a semiconductor substrate in the semiconductor processing chamber according to claim 1 , the semiconductor substrate seated on the substrate support; detecting acoustic emissions; identifying an acoustic emission above a threshold emission level while performing the process; and adjusting the process or process conditions to reduce stress detected by the acoustic emission.
  17. 17 . The method of semiconductor processing of claim 16 , wherein the process is performed while maintaining the substrate support at a temperature below or about 0° C.
  18. 18 . The method of semiconductor processing of claim 16 , wherein a second acoustic emission probe is positioned against the electrostatic chuck assembly.
  19. 19 . The method of semiconductor processing of claim 18 , further comprising detecting acoustic emissions from the second acoustic emission probe positioned against the electrostatic chuck assembly.
  20. 20 . The method of semiconductor processing of claim 16 , wherein the process comprises a deposition, a masking, or a removal operation.

Description

TECHNICAL FIELD The present technology relates to semiconductor systems, processes, and equipment. More specifically, the present technology relates to processes and systems to protect substrate support assemblies. BACKGROUND Many substrate processing systems include substrate supports, such as an electrostatic chuck in combination with a base, to retain a wafer during semiconductor substrate processing. The substrate support may include a number of layers of materials or plates coupled together. The plates may perform separate functions, such as operating as an electrode, operating as a heater, operating to cool, among other aspects of semiconductor processing. Based on heating, cooling, and processing environment exposure, a number of stresses may be imparted on layers of the substrate support as well as on the semiconductor substrate. Thermal or other stresses imparted on some components of the substrate support or substrate may cause deformation, which may lead to cracking or other damage to the component of the support as well as the semiconductor substrate. Thus, there is a need for improved systems and methods that can be used to improve lifetime and performance of processing chambers and components. These and other needs are addressed by the present technology. SUMMARY Exemplary semiconductor processing chambers may include a chamber body defining a substrate processing region. The chambers may include a substrate support positioned within the substrate processing region. The substrate support may include a ceramic or polymeric insulator plate positioned between a cathode assembly and an electrostatic chuck assembly. The chambers may include an acoustic emission probe in contact with the insulator plate of the substrate support. In some embodiments, the insulator plate may be seated within a ground plate, and the acoustic emission probe may extend through the ground plate to contact the insulator plate. The insulator plate may be or include a polymeric material seated within an annular ceramic support. The chambers may include a plurality of acoustic emission probes in contact with the insulator plate of the substrate support. The acoustic emission probe may be positioned in contact with a radial edge of the insulator plate. The electrostatic chuck assembly may be maintained at atmospheric pressure, and the cathode assembly may be maintained at a pressure maintained below or about 50 Torr, The insulator plate may define a boundary between the atmospheric pressure and the pressure maintained below or about 50 Torr. The acoustic emission probe may be configured to monitor emissions through the insulator plate. The acoustic emission probe may be configured to identify emissions above a threshold greater than or about 35 dB. Some embodiments of the present technology may encompass semiconductor processing chambers. The chambers may include a chamber body defining a substrate processing region. The chambers may include a substrate support positioned within the substrate processing region. The substrate support may include an electrostatic chuck configured to support a semiconductor substrate. The substrate support may include a cooling plate coupled with the electrostatic chuck and configured to receive a temperature controlled fluid at a first temperature. The substrate support may include a facility plate operable at a second temperature greater than the first. The substrate support may include a gap formed between the cooling plate and the facility plate within the substrate support. The chambers may include an acoustic emission probe extending through the facility plate and the cooling plate. The acoustic emission probe may be in contact with the electrostatic chuck. In some embodiments, the facility plate may be coupled with the electrostatic chuck at a radial edge of the electrostatic chuck. The facility plate may maintain the gap along a radial edge of the cooling plate. The temperature controlled fluid may be maintained at a temperature below or about −50° C. A vacuum may be maintained within the gap between the cooling plate and the facility plate. The facility plate may define a recessed ledge on a surface of the facility plate opposite a surface of the facility plate facing the gap. A vacuum seal may extend along the recessed ledge and may form a seal between the acoustic emission probe and the facility plate. The acoustic emission probe may be seated within a recess defined within the electrostatic chuck. The acoustic emission probe may be configured to detect stress effects within a substrate seated on the substrate support. Some embodiments of the present technology may encompass methods of semiconductor processing. The methods may include performing a process on a semiconductor substrate, where the semiconductor substrate may be seated on a substrate support within a processing region of a semiconductor processing chamber. The methods may include detecting acoustic emissions from an acoust