US-12625172-B2 - Apparatus for testing image sensor and operating method thereof

Abstract

An apparatus for testing an image sensor includes a load resistor, a first switch configured to be electrically connected to a first signal line of a device under test and a first end of the load resistor, a second switch configured to be electrically connected to a second signal line of the device under test and a second end of the load resistor, a first parametric measuring unit electrically connected to the first switch, and a second parametric measuring unit electrically connected to the second switch. At least one of the first parametric measuring unit and the second parametric unit is configured to correct an error of the load resistor during a testing operation of an output voltage of the device under test.

Inventors

• Seongkwan LEE
• Minho Kang
• Hyungsun Ryu
• Cheolmin Park
• Jaemoo CHOI

Assignees

• SAMSUNG ELECTRONICS CO., LTD.

Dates

Publication Date

20260512

Application Date

20230314

Priority Date

20220811

Claims (19)

1. 1 . An apparatus for testing an image sensor comprising: a load resistor; a first switch electrically connected to a first signal line of a device under test and a first end of the load resistor; a second switch electrically connected to a second signal line of the device under test and a second end of the load resistor; a first parametric measuring unit electrically connected to the first switch; a second parametric measuring unit electrically connected to the second switch; and a calibration board configured to measure a first resistance value of the first switch and a second resistance value of the second switch, before a testing operation of an output voltage of the device under test, wherein at least one of the first parametric measuring unit and the second parametric measuring unit is configured to correct an error of the load resistor during the testing operation of the output voltage of the device under test.
2. 2 . The apparatus of claim 1 , wherein the resistance value of the load resistor is about 100Ω, and the apparatus is free of a variable resistor.
3. 3 . The apparatus of claim 1 , wherein, during the testing operation of the output voltage of the device under test, a test resistance value of the apparatus as seen at the device under test is about 100Ω.
4. 4 . The apparatus of claim 1 , wherein, when a target load resistance value is not greater than a resistance value of the load resistor during the testing operation of the output voltage of the device under test, a corresponding parametric measuring unit of the first and second parametric measurement units is configured to generate a current in an opposite direction to a current flowing through the load resistor in proportion to a measured load voltage, wherein the target load resistance value is obtained by subtracting a first resistance value of the first switch and a second resistance value of the second switch from a test resistance value of the apparatus as seen at the device under test.
5. 5 . The apparatus of claim 1 , wherein, when a target load resistance value is greater than a resistance value of the load resistor during the testing operation of the output voltage of the device under test, a corresponding parametric measuring unit of the first and second parametric measurement units is configured to generate a current in a same direction as a current flowing through the load resistor in proportion to a measured load voltage, wherein the target load resistance value is obtained by subtracting a first resistance value of the first switch and a second resistance value of the second switch from a test resistance value of the apparatus as seen at the device under test.
6. 6 . The apparatus of claim 1 , further comprising: a Field Programmable Gate Array (FPGA) configured to control the first parametric measuring unit and the second parametric measuring unit during the testing operation of the output voltage of the device under test.
7. 7 . The apparatus of claim 6 , further comprising: a micro control unit (MCU) configured to control the FPGA.
8. 8 . The apparatus of claim 1 , wherein each of the first and second parametric measuring units is configured to measure a test load voltage across the first and second ends of the load resistor after setting a calibration current to zero, wherein an error of the load resistor is corrected based on the test load voltage by generating an output current having a value that is configured to compensate for a difference between an output resistance value and a target load resistance value indicated by the test load voltage.
9. 9 . The apparatus of claim 1 , wherein each of the first and second parametric measuring units is configured to measure a test load voltage across the first and second ends of the load resistor by increasing a calibration current in a direction of current flow through the load resistor or in a direction opposite to that of the current flow, wherein an error of the load resistor is corrected based on the test load voltage.
10. 10 . An apparatus for testing an image sensor comprising: at least one parametric measuring unit; and a controller configured to control the at least one parametric measuring unit, wherein the controller is configured to: calculate a target load resistance value using a first resistance value of a first switch electrically connected to a first signal line of a device under test and a second resistance value of a second switch electrically connected to a second signal line of the device under test; measure a test load voltage at first and second ends of a load resistor connected to the first switch and the second switch, respectively, in the at least one parametric measuring unit; calculate a calibration current corresponding to the target load resistance value using the test load voltage; and provide an output current from the at least one parametric measuring unit, wherein the output current is based on the calibration current, wherein the at least one parametric measuring unit is configured to correct an error of the load resistor during a testing operation of an output voltage of the device under test.
11. 11 . The apparatus of claim 10 , wherein the controller is configured to measure the first resistance value and the second resistance value on a diagnostic board.
12. 12 . The apparatus of claim 10 , wherein the target load resistance value is obtained by subtracting the first resistance value and the second resistance value from a test resistance value, wherein the test resistance value is a resistance value of the load resistor as seen at the device under test.
13. 13 . The apparatus of claim 12 , wherein the test resistance value is about 100Ω.
14. 14 . The apparatus of claim 12 , wherein each of the first resistance value and the second resistance value is between about 1Ω to 5Ω.
15. 15 . An apparatus for testing an image sensor comprising: at least one parametric measuring unit; and a controller configured to control the at least one parametric measuring unit, wherein the controller is configured to: calculate a target load resistance value using a first resistance value of a first switch electrically connected to a first signal line of a device under test and a second resistance value of a second switch electrically connected to a second signal line of the device under test; determine whether an actual resistance value of a load resistor having a first end electrically connected to the first switch and a second end electrically connected to the second switch in the at least one parametric measuring unit is greater than the target load resistance value; measure a test load voltage across the first and second ends of the load resistor while increasing a calibration current in a direction opposite to that of a current flowing through the load resistor in a corresponding parametric measuring unit of the at least one parametric measuring unit when the actual resistance value is greater than the target load resistance value; and generate an output current based on the measuring of the test load voltage, wherein the at least one parametric measuring unit is configured to correct an error of the load resistor during a testing operation of an output voltage of the device under test.
16. 16 . The apparatus of claim 15 , wherein the controller is configured to measure a test load voltage across the first and second ends of the load resistor while increasing a calibration current in a same direction as the current flowing through the load resistor in the corresponding parametric measuring unit, when the actual resistance value is not greater than the target load resistance value.
17. 17 . The apparatus of claim 15 , wherein the controller is configured to correct an error of the load resistor based on the test load voltage by generating the output current having a value that is configured to compensate for a difference between the actual resistance value and the target load resistance value indicated by the test load voltage.
18. 18 . The apparatus of claim 15 , wherein the controller is configured to measure the first resistance value and the second resistance value on a calibration board.
19. 19 . The apparatus of claim 15 , wherein the controller is configured to transmit an output signal indicating the measured test load voltage to an external device.

Description

CROSS-REFERENCE TO RELATED APPLICATION This application claims the priority and benefit of Korean Patent Application No. 10-2022-0100786, filed on Aug. 11, 2022, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference. FIELD The present inventive concept relates to a semiconductor package and a method for manufacturing the semiconductor package. BACKGROUND In general, a testing apparatus may test a single device under test (DUT) using a power supply signal line. The testing apparatus sends and receives signals to and from each semiconductor device under test by a test program operated by a central processing unit (CPU), and tests an electrical function of each semiconductor device under test. In such a testing apparatus, a test time for evaluating the characteristics of the semiconductor chip may be increased as manufactured semiconductor chips become more highly integrated. SUMMARY An aspect of the present inventive concept is to provide an apparatus for testing an image sensor that does not require an additional variable resistor in order to reduce an error of a load resistor, and an operating method thereof. An aspect of the present inventive concept is to provide an apparatus for testing an image sensor that can increase the number of devices under test capable of being tested simultaneously and an operating method thereof. According to an aspect of the present inventive concept, in an apparatus for testing an image sensor, the testing apparatus includes a load resistor; a first switch that is configured to be electrically connected to a first signal line of a device under test and a first end of the load resistor; a second switch that is configured to be electrically connected to a second signal line of the device under test and a second end of the load resistor; a first parametric measuring unit electrically connected to the first switch; and a second parametric measuring unit electrically connected to the second switch. At least one of the first parametric measuring unit and the second parametric unit is configured to correct an error of the load resistor during a testing operation of an output voltage of the device under test. According to an aspect of the present inventive concept, a method of operating an apparatus for testing an image sensor includes calculating a target load resistance value using a first resistance value of a first switch that is configured to be electrically connected to a first signal line of a device under test and a second resistance value of a second switch that is configured to be electrically connected to a second signal line of the device under test; measuring a test load voltage at first and second ends of a load resistor connected to the first switch and the second switch, respectively, in at least one parametric measuring unit; calculating a calibration current corresponding to the target load resistance value using the test load voltage; and providing an output current from the at least one parametric measuring unit, wherein the output current is based on the calibration current. According to another aspect of the present inventive concept, a method of operating an apparatus for testing an image sensor includes calculating a target load resistance value using a first resistance value of a first switch that is configured to be electrically connected to a first signal line of a device under test and a second resistance value of a second switch that is configured to be electrically connected to a second signal line of the device under test; determining whether an actual resistance value of a load resistor having a first end that is electrically connected to the first switch and a second end that is electrically connected to the second switch in at least one parametric measuring unit is greater than the target load resistance value; measuring a test load voltage across the first and second ends of the load resistor while increasing a calibration current in a direction opposite to that of a current flowing through the load resistor in a corresponding parametric measuring unit of the at least one parametric measurement unit when the actual resistance value is greater than the target load resistance value; and generating an output current based on the measuring of the test load voltage. BRIEF DESCRIPTION OF DRAWINGS The above and other aspects, features, and advantages of the present inventive concept will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which: FIG. 1 is a view exemplarily illustrating a test facility according to an example embodiment of the present inventive concept; FIG. 2 is a diagram illustrating a process of varying a load resistor in a general or conventional testing apparatus; FIG. 3 is a diagram conceptually illustrating a process of varying a load resistor in the testing apparatus according to an example embodiment of the pr