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US-12625320-B2 - Photodetectors with an adjoined slotted waveguiding structure

US12625320B2US 12625320 B2US12625320 B2US 12625320B2US-12625320-B2

Abstract

Structures for a photonics chip that include a photodetector and methods of forming such structures. The structure comprises a photodetector including a pad and a semiconductor layer on the pad. The structure further comprises a waveguiding structure including a first waveguide core, a second waveguide core, a slot between the first waveguide core and the second waveguide core, and a plurality of waveguide core segments. The waveguiding structure is adjoined to a side edge of the pad adjacent to the semiconductor layer. Each of the plurality of waveguide core segments includes a portion that is disposed in the slot.

Inventors

  • Yusheng Bian
  • Won Suk LEE
  • Sujith Chandran
  • Abdelsalam Aboketaf

Assignees

  • GLOBALFOUNDRIES U.S. INC.

Dates

Publication Date
20260512
Application Date
20240110

Claims (20)

  1. 1 . A structure for a photonics chip, the structure comprising: a photodetector including a pad and a semiconductor layer on the pad, the pad including a first side edge; and a first waveguiding structure including a first waveguide core, a second waveguide core, a first slot between the first waveguide core and the second waveguide core, and a first plurality of waveguide core segments, the first waveguiding structure adjoined to the first side edge of the pad adjacent to the semiconductor layer, and each of the first plurality of waveguide core segments including a first portion that is disposed in the first slot.
  2. 2 . The structure of claim 1 wherein the semiconductor layer has a longitudinal axis, and the first slot is centered along the first side edge relative to the longitudinal axis of the semiconductor layer.
  3. 3 . The structure of claim 1 wherein the pad includes a second side edge opposite from the first side edge, and further comprising: a second waveguiding structure including a third waveguide core, a fourth waveguide core, a second slot between the third waveguide core and the fourth waveguide core, and a second plurality of waveguide core segments, the second waveguiding structure adjoined to the second side edge of the pad adjacent to the semiconductor layer, and the second plurality of waveguide core segments extending across the second slot from the third waveguide core to the fourth waveguide core.
  4. 4 . The structure of claim 3 wherein the semiconductor layer is configured to absorb light having a wavelength, and the second plurality of waveguide core segments have a first period equal to a one-quarter of the wavelength or an integer multiple of one-quarter of the wavelength.
  5. 5 . The structure of claim 4 wherein the first plurality of waveguide core segments have a second period equal to a one-half of the wavelength or an integer multiple of one-half of the wavelength.
  6. 6 . The structure of claim 1 wherein the semiconductor layer is configured to absorb light having a wavelength, and the first plurality of waveguide core segments have a period equal to a one-half of the wavelength or an integer multiple of one-half of the wavelength.
  7. 7 . The structure of claim 1 wherein the first waveguiding structure further includes a third waveguide core disposed in elevation over the first waveguide core, a fourth waveguide core disposed in elevation over the second waveguide core, and a second plurality of waveguide core segments disposed in elevation over the first plurality of waveguide core segments.
  8. 8 . The structure of claim 7 wherein the first waveguide core, the second waveguide core, and the first plurality of waveguide core segments comprise a first material, and the third waveguide core, the fourth waveguide core, and the second plurality of waveguide core segments comprise a second material different from the first material.
  9. 9 . The structure of claim 8 wherein the first material is single-crystal silicon, and the second material is silicon nitride or polysilicon.
  10. 10 . The structure of claim 1 wherein the semiconductor layer comprises germanium.
  11. 11 . The structure of claim 1 further comprising: a first doped region in the pad, the first doped region having a first conductivity type; and a second doped region in the pad, the second doped region having a second conductivity type opposite to the first conductivity type, wherein the semiconductor layer is disposed on a portion of the pad between the first doped region and the second doped region, and the portion of the pad comprises intrinsic semiconductor material.
  12. 12 . The structure of claim 1 wherein the first plurality of waveguide core segments are separated by a plurality of gaps, and the first plurality of waveguide core segments and the plurality of gaps are dimensioned and positioned to define a subwavelength grating.
  13. 13 . The structure of claim 12 wherein the plurality of gaps are filled by portions of a dielectric material to define a metamaterial.
  14. 14 . The structure of claim 1 further comprising: a third waveguide core including a tapered section disposed adjacent to the first waveguide core of the first waveguiding structure, the tapered section of the third waveguide core separated from the first waveguiding structure by a gap, and the tapered section of the third waveguide core configured to transfer light to the first waveguiding structure.
  15. 15 . The structure of claim 1 wherein the first waveguide core has a first longitudinal axis, the second waveguide core has a second longitudinal axis, and each of the first plurality of waveguide core segments is lengthwise aligned transverse to the first longitudinal axis and transverse to the second longitudinal axis.
  16. 16 . The structure of claim 1 wherein the first waveguide core has a first sidewall bordering the first slot and a second sidewall opposite from the first sidewall, and each of the first plurality of waveguide core segments has a second portion that projects outwardly from the second sidewall of the first waveguide core.
  17. 17 . The structure of claim 16 wherein the second waveguide core has a first sidewall bordering the first slot and a second sidewall opposite from the first sidewall, and each of the first plurality of waveguide core segments has a third portion that projects outwardly from the second sidewall of the second waveguide core.
  18. 18 . The structure of claim 17 wherein the first portion of each of the first plurality of waveguide core segments extends across the first slot from the first waveguide core to the second waveguide core.
  19. 19 . The structure of claim 1 wherein the first portion of each of the first plurality of waveguide core segments extends across the first slot from the first waveguide core to the second waveguide core.
  20. 20 . A method of forming a structure for a photonics chip, the method comprising: forming a photodetector that includes a pad and a semiconductor layer on the pad; and forming a waveguiding structure that includes a first waveguide core, a second waveguide core, a slot between the first waveguide core and the second waveguide core, and a plurality of waveguide core segments, wherein the waveguiding structure is adjoined to a side edge of the pad adjacent to the semiconductor layer, and each of the plurality of waveguide core segments includes a portion that is disposed within the slot.

Description

BACKGROUND The disclosure relates to photonics chips and, more specifically, to structures for a photonics chip that include a photodetector and methods of forming such structures. Photonics chips are used in many applications and systems including, but not limited to, data communication systems and data computation systems. A photonics chip includes a photonic integrated circuit comprised of photonic components, such as modulators, polarizers, and optical couplers, that are used to manipulate light received from a light source, such as an optical fiber or a laser. A photodetector may be employed in the photonic integrated circuit to convert light, which may be modulated as an optical signal, into an electrical signal. The responsivity of a photodetector is a measure of the optical-to-electrical conversion efficiency. The bandwidth of a photodetector is a measure of the speed with which the photodetector responds to variations in the incident optical power. Generally, design modifications that improve the bandwidth of a photodetector will reduce the responsivity. Improved structures for a photonics chip that include a photodetector and methods of forming such structures are needed. SUMMARY In an embodiment of the invention, a structure for a photonics chip is provided. The structure comprises a photodetector including a pad and a semiconductor layer on the pad. The structure further comprises a waveguiding structure including a first waveguide core, a second waveguide core, a slot between the first waveguide core and the second waveguide core, and a plurality of waveguide core segments. The waveguiding structure is adjoined to a side edge of the pad adjacent to the semiconductor layer. Each of the plurality of waveguide core segments includes a portion that is disposed in the slot. In an embodiment of the invention, a method of forming a structure for a photonics chip is provided. The method comprises forming a photodetector that includes a pad and a semiconductor layer on the pad, and forming a waveguiding structure that includes a first waveguide core, a second waveguide core, a slot between the first waveguide core and the second waveguide core, and a plurality of waveguide core segments. The waveguiding structure is adjoined to a side edge of the pad adjacent to the semiconductor layer, and each of the plurality of waveguide core segments includes a portion that is disposed within the slot. BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate various embodiments of the invention and, together with a general description of the invention given above and the detailed description of the embodiments given below, serve to explain the embodiments of the invention. In the drawings, like reference numerals refer to like features in the various views. FIG. 1 is a top view of a structure at an initial fabrication stage of a processing method in accordance with embodiments of the invention. FIG. 2 is a cross-sectional view taken generally along line 2-2 in FIG. 1. FIG. 2A is a cross-sectional view taken generally along line 2A-2A in FIG. 1. FIG. 3 is a top view of the structure at a fabrication stage of the processing method subsequent to FIGS. 1, 2, 2A. FIG. 4 is a cross-sectional view taken generally along line 4-4 in FIG. 3. FIG. 4A is a cross-sectional view taken generally along line 4A-4A in FIG. 3. FIGS. 5, 5A are cross-sectional views of the structure at a fabrication stage of the processing method subsequent to FIGS. 3, 4, 4A. FIG. 6 is a top view of a structure in accordance with alternative embodiments of the invention. FIG. 7 is a top view of a structure in accordance with alternative embodiments of the invention. FIGS. 8, 8A are cross-sectional views of structures in accordance with alternative embodiments of the invention. FIG. 9 is a top view of a structure in accordance with alternative embodiments of the invention. FIG. 10 is a top view of a structure in accordance with alternative embodiments of the invention. FIG. 11 is a top view of a structure in accordance with alternative embodiments of the invention. DETAILED DESCRIPTION With reference to FIGS. 1, 2, 2A and in accordance with embodiments of the invention, a structure 10 includes a waveguide core 11, a waveguide core 12, a waveguide core 13, and a photodetector 14 that are positioned on, and above, a dielectric layer 16 and a semiconductor substrate 18. In an embodiment, the dielectric layer 16 may be comprised of a dielectric material, such as silicon dioxide, and the semiconductor substrate 18 may be comprised of a semiconductor material, such as single-crystal silicon. In an embodiment, the dielectric layer 16 may be a buried oxide layer of a silicon-on-insulator substrate, the dielectric layer 16 may be disposed between the waveguide cores 11, 12, 13 and the semiconductor substrate 18, and the dielectric layer 16 may provide low-index cladding for the